An electronic device that includes a substrate and a die disposed on the substrate, the die having an active surface. Wire bonds are attached from the active surface of the die to the substrate. A radiation barrier is attached to the substrate and disposed over the die. The radiation barrier is configured to mitigate electromagnetic radiation exposure to the die. A mold compound is formed over the die, the wire bonds, and the radiation barrier.

A method for fabricating a package structure is provided. The method includes premixing cellulose nanofibrils (CNFs) and a graphene material in a solvent to form a solution; removing the solvent from the solution to form a composite filler; mixing a prepolymeric material with the composite filler to form a composite material; and performing a molding process using the composite material.

In one example, an electronic device includes a substrate having an upper side, a lower side opposite to the upper side, a lateral side connecting the upper side to the lower side, and a conductive structure. An electronic component is coupled to the conductive structure at the upper side of the substrate. An encapsulant covers a lateral side of the electronic component and the upper side of the substrate and having an encapsulant top side and an encapsulant lateral side. The electronic device includes first metallic coating having a first metallic coating top side, a first metallic coating sidewall; and a first metallic coating thickness. The electronic device includes a second metallic coating having a second metallic coating thickness that is greater than the first metallic coating thickness. In the present example, the first metallic coating top side is over the encapsulant top side, the first metallic coating sidewall is over the encapsulant lateral side, and the second metallic coating is over the encapsulant top side. Other examples and related methods are also disclosed herein.

In one example, an electronic device includes a substrate having an upper side, a lower side opposite to the upper side, a lateral side connecting the upper side to the lower side, and a conductive structure. An electronic component is coupled to the conductive structure at the upper side of the substrate. An encapsulant covers a lateral side of the electronic component and the upper side of the substrate and having an encapsulant top side and an encapsulant lateral side. The electronic device includes first metallic coating having a first metallic coating top side, a first metallic coating sidewall; and a first metallic coating thickness. The electronic device includes a second metallic coating having a second metallic coating thickness that is greater than the first metallic coating thickness. In the present example, the first metallic coating top side is over the encapsulant top side, the first metallic coating sidewall is over the encapsulant lateral side, and the second metallic coating is over the encapsulant top side. Other examples and related methods are also disclosed herein.

Aspects of the present disclosure include systems, structures, circuits, and methods providing integrated circuit (IC) packages or modules having diagonalized leads. First and second semiconductor dies are disposed on a substrate. First and second coils are configured on the substrate for a transformer. The transformer may include a core. The leads or pins may be aligned along a diagonal of the package body, providing increased creepage. The IC packages and modules may include various types of circuits; in some examples, IC packages or modules may include a galvanically isolated gate driver or other high voltage circuit.

The present disclosure provides a method of manufacturing a semiconductor device. The method includes: providing a semiconductor structure, in which the semiconductor structure includes alternatively disposed first nitride portions and second nitride portions wrapping portions of an oxide layer, a dielectric layer disposed between one of the first nitride portions and one of the second nitride portions, a top nitride surrounded by the one of the first nitride portions or the one of the second nitride portions, a filling material, and a cap layer disposed on the filling material; forming a plurality of trenches to expose the portions of the oxide layer wrapped by the first nitride portions and the second nitride portions; forming air gaps by removing the portions of the oxide layer; and conformally forming an encapsulating layer on inner sidewalls of the trenches to encapsulate the air gaps.

The present disclosure provides a method of manufacturing a semiconductor device. The method includes: providing a semiconductor structure, in which the semiconductor structure includes alternatively disposed first nitride portions and second nitride portions wrapping portions of an oxide layer, a dielectric layer disposed between one of the first nitride portions and one of the second nitride portions, a top nitride surrounded by the one of the first nitride portions or the one of the second nitride portions, a filling material, and a cap layer disposed on the filling material; forming a plurality of trenches to expose the portions of the oxide layer wrapped by the first nitride portions and the second nitride portions; forming air gaps by removing the portions of the oxide layer; and conformally forming an encapsulating layer on inner sidewalls of the trenches to encapsulate the air gaps.

A stacked package structure and a manufacturing method thereof are provided. The stacked package structure includes an upper redistribution layer, a first chip, and an upper molding layer. The first chip is disposed on the upper redistribution layer and is electrically connected to the upper redistribution layer. The upper molding layer is disposed on the first chip and the upper redistribution layer, and is configured to package the first chip. The upper molding layer includes a recess, the recess is recessed relative to a surface of the upper molding layer away from the upper redistribution layer, and the recess is circumferentially formed around a periphery of the upper molding layer.

In some examples, a sensor package includes a semiconductor die having a sensor; a mold compound covering a portion of the semiconductor die; and a cavity formed in a top surface of the mold compound, the sensor being in the cavity. The sensor package includes an adhesive abutting the top surface of the mold compound, and a semi-permeable film abutting the adhesive and covering the cavity. The semi-permeable film is approximately flush with at least four edges of the top surface of the mold compound.

A semiconductor package includes a first substrate and a first semiconductor device. The first semiconductor device is bonded to the first substrate and includes a second substrate, a plurality of first dies and a second die. The first dies are disposed between the first substrate and the second substrate. The second die is surrounded by the first dies. A cavity is formed among the first dies, the first substrate and the second substrate, and a gap is formed between the second die and the first substrate.