H10W72/352

Sintering paste and use thereof for connecting components

The invention relates to a sintering paste consisting of: (A) 30 to 40 wt. % of silver flakes with an average particle size ranging from 1 to 20 m, (B) 8 to 20 wt. % of silver particles with an average particle size ranging from 20 to 100 nm, (C) 30 to 45 wt. % of silver(I) oxide particles, (D) 12 to 20 wt. % of at least one organic solvent, (E) 0 to 1 wt. % of at least one polymer binder, and (F) 0 to 0.5 wt. % of at least one additive differing from constituents (A) to (E).

Semiconductor devices and methods of forming the same

Semiconductor devices including the use of solder materials and methods of manufacturing are provided. In embodiments the solder materials utilize a first tensile raising material, a second tensile raising material, and a eutectic modifier material. By utilizing the materials a solder material can be formed and used with a reduced presence of needles that may otherwise form during the placement and use of the solder material.

Dual side cooled power module with three-dimensional direct bonded metal substrates

A substrate includes a ceramic tile and a three-dimensional (3D) conductive structure. The 3D conductive structure includes a planar base layer having a bottom surface bonded to a top surface of the ceramic tile, and a block disposed above the planar base layer. The block is monolithically integrated with the planar base layer. A top surface of the block is configured as a die attach pad. The planar base layer has a base vertical thickness from the top surface of the ceramic tile to a top surface of the planar base layer. The block and the planar base layer have a combined vertical thickness from the top surface of the ceramic tile to a top surface of the block that is greater than the base vertical thickness.

Doubled-Sided Liquid-Cooling Power Module Mounted with a Plurality of Power Semiconductor Devices
20260068672 · 2026-03-05 ·

A double-sided liquid-cooling power module mounted with a plurality of power semiconductor devices, including a watertight housing and a power device package, the power device package including a lower ceramic substrate, a power semiconductor device, a copper saddle-shaped upper guide column, an upper ceramic substrate, a shunt support column, and a resin dielectric package, a bottom surface electrode of the power semiconductor device being correspondingly press-bonded with a silver thin film layer, a top surface electrode being press-bonded with an interfacial silver thin film layer; the power semiconductor device is encapsulated by the resin dielectric package; an electrical conduction loop is formed by press-bonding the power semiconductor device to the lower ceramic substrate via the silver thin film layer and press-bonding the copper saddle-shaped upper column to the power semiconductor device via the silver thin film layer; a double-sided heat dissipation effect is achieved with the watertight housing.

SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
20260068667 · 2026-03-05 ·

A semiconductor package structure includes a first package component, a second package component disposed over the first package component, a plurality of connectors between the first package component and the second package component, an underfill between the first package component and the second package component and surrounding the plurality of connectors, and a plurality of heat sink fibers in the underfill. A thermal conductivity of the plurality of heat sink fibers is greater than a thermal conductivity of the underfill.

SINTERING OF SEMICONDUCTOR DEVICE ASSEMBLIES USING AN ASSIST FILM

In a general aspect, a method of sintering a semiconductor device assembly having a surface projection includes applying sintering material to a die attach surface. The method also includes disposing a semiconductor die on the sintering material, the semiconductor die having a surface including a substantially planar portion and at least one projection extending from the substantially planar portion in a direction orthogonal to the surface. The method also includes disposing a film on the surface of the semiconductor die, the film including at least one spacer, where the film is disposed such that the at least one spacer contacts the substantially planar portion. The method also includes applying pressure to the film. The method also includes applying thermal energy at a first sintering temperature to sinter the semiconductor die to the die attach surface. The method also includes removing the film.

PACKAGING DEVICES AND METHODS FOR FORMING THE SAME
20260068703 · 2026-03-05 ·

A packaging device is provided. The packaging device includes a die disposed over a laminate, the die comprising a first via structure, and an interposer disposed between the die and the laminate. The interposer includes a second via structure. The packaging device also includes a lid disposed over the interposer and covering the die, a first patterned conductive layer disposed between the die and the interposer, and between the lid and the interposer; and a second patterned conductive layer disposed between the laminate and the interposer. The first patterned conductive layer includes a bonding structure electrically and thermally connected to the first via structure and the second via structure.

ELECTRONIC COMPONENT EMBEDDED SUBSTRATE AND METHOD OF MANUFACTURING THE SAME

An electronic component embedded substrate may include at least an electronic component including a first terminal surface and a first terminal electrode, the first terminal electrode being on the first terminal surface, a first conductive layer facing the first terminal surface, an insulating layer between the first conductive layer and the first terminal surface, the insulating layer including a via hole penetrating therethrough, the first conductive layer filling the via hole and being connected to the first terminal electrode, and a seed layer in the via hole, the seed layer including a conductive film and an adhesive film, the adhesive film being between the conductive film and a boundary of the via hole.

CONDUCTIVE DIE ATTACH COMPOSITIONS
20260062595 · 2026-03-05 ·

Provided herein is a conductive die attach composition comprising: A resin comprising those containing one or more maleimide, itaconimide or nadimide functional groups or combinations of said functional groups; An epoxy component; A (meth)acrylate component; An aromatic anhydride; and A conductive filler.

SEMICONDUCTOR PACKAGE AND METHOD

A semiconductor package including two different adhesives and a method of forming are provided. The semiconductor package may include a package component having a semiconductor die bonded to a substrate, a first adhesive over the substrate, a heat transfer layer on the package component, and a lid attached to the substrate by a second adhesive. The first adhesive may encircle the package component and the heat transfer layer. The lid may include a top portion on the heat transfer layer and the first adhesive, and a bottom portion attached to the substrate and encircling the first adhesive. A material of the second adhesive may be different from a material of the first adhesive.