Patent classifications
H10P72/0616
Device and method for determining wafer bow
An apparatus for measuring bow of a wafer includes a substrate holder including a support surface configured to support a wafer, and an air flow system including a plurality of air outlets in the support surface which are configured to output air for elevating the wafer above the substrate holder. A capacitor array unit including a plurality of electrodes laterally spaced from one another in the capacitor array unit, each electrode facing the support surface and being spaced a respective fixed distance from the support surface such that each electrode can form a capacitor with an opposing area of a wafer elevated by the substrate holder.
SYSTEM AND METHOD FOR OPTIMIZING THROUGH SILICON VIA OVERLAY
A wafer shape metrology system includes a wafer shape metrology sub-system configured to perform stress-free shape measurements on an active wafer, a carrier wafer, and a bonded device wafer. The active wafer includes functioning logic circuitry and the carrier wafer is electrically passive. The wafer shape metrology system includes a controller communicatively coupled to the wafer shape metrology sub-system. The controller is configured to receive stress-free shape measurements; determine overlay distortion between features on the active wafer and the carrier wafer; and convert the overlay distortion to a feed-forward correction for one or more lithographic scanners. The controller is also configured to determine a control range for a bonder or lithography scanner; predict an overlay distortion pattern; calculate an optimal control signature based on a minimal achievable overlay; and provide a feed-forward correction to the bonder or lithography scanner based on the calculated optimal control signature.
MAPPING DEVICE AND LOAD PORT APPARATUS
A mapping device capable of detecting a stored state of a square shaped plate-form object including: a first detection part having a first detection axis which crosses a first side and a second side perpendicular to the first side object to detect a first corner thickness; a second detection part having a second detection axis which crosses the first and third sides of the object to detect a second corner thickness; a first information acquiring unit acquiring a first information relating to a warpage amount in the first direction of the object; an adjustment calculation unit calculating an adjusted detection value relating to the thickness of the object in the first direction by adjusting, based on the first information, a sum of the first and second corner thicknesses or an average thereof; and a distinguishing unit distinguishing the stored state of the object using the adjusted detection value.
Semiconductor structure and fabrication method thereof
A semiconductor structure includes a substrate; a top metal layer disposed in a top inter-metal dielectric (IMD) layer on the substrate; a first passivation layer covering the top metal layer and the top IMD layer; a pad layer disposed on the first passivation layer and electrically connected to the top metal layer; a spin-on glass (SOG) layer covering the pad layer and the first passivation layer; and a second passivation layer disposed on the SOG layer.
Compensation method for wafer bonding
A compensation method for wafer bonding includes bonding a first wafer and a second wafer, the first wafer including a first conductive pad and a second conductive pad. A first overlay check is performed. A result of the first overlay check is determined whether the result is within a first predetermined specification. If the result of the first overlay check is determined as beyond the first predetermined specification, performing a first compensation method to form a compensated first wafer and a compensated second wafer, wherein a position of a first conductive pad of the compensated first wafer is different from a position of the first conductive pad of the first wafer, and a position of a second conductive pad of the compensated first wafer is different from a position of the second conductive pad of the first wafer.
WAFER TRANSFER DEVICE DETECTION SYSTEM AND WAFER TRANSFER DEVICE
A wafer transfer device detection system includes detectors, a filling device, a wafer transfer device and a control center. Detectors are disposed between a plurality of process equipment in a process. Filling device performs a filling procedure. Wafer transfer device includes body and sensor disposed in body. Wafer transfer device transmits wafer of process. Sensor detects a gas concentration inside wafer transfer device during a transportation stage of the process. If gas concentration is higher than a preset gas concentration, sensor generates a wireless communication signal. Control center is coupled to detectors and filling device. If detectors receive the wireless communication signal. Detectors notify control center so that the control center transmits wafer transfer device to filling device from process. Control center controls the filling device to perform filling procedure so as to adjust gas concentration to a target gas concentration to retransmit wafer transfer device back to process.
IN-SITU WAFER MONITORING WITH DYNAMIC BACKSIDE GAS FEEDBACK CONTROL AS WAFER BOW COUNTERMEASURE
Aspects of the present disclosure provide an electrostatic chuck (ESC)/backside gas (BSG) system. For example, the ESC/BSG system can include an ESC and a BSG cooling device integrated with the ESC. The ESC can be configured to generate an electrostatic chucking force according to an electrostatic voltage applied thereto to clamp a semiconductor structure with a backside placed onto the ESC. The BSG cooling device can be configured to introduce to the backside of the semiconductor structure a backside gas at a backside gas pressure. The ESC/BSG system can further include a monitoring system configured to monitoring bowing of the semiconductor structure, and a controller coupled between the monitoring system and the ESC and the BSG cooling device. The controller can be configured to adjust the electrostatic voltage and/or the backside gas pressure according to the bowing of the semiconductor structure.
SILICON WAFER SIDE EDGE DETECTION DEVICE AND SILICON WAFER SORTING MACHINE
The present disclosure discloses a silicon wafer side edge detection device, comprising a first detection unit and a second detection unit, wherein the first detection unit and the second detection unit are of the same structure and are respectively configured to detect two mutually parallel side edges of a silicon wafer; and the first detection unit and the second detection unit each comprises a side edge detection assembly, the side edge detection assembly comprising a first point light source, a first optical path defining element, and a camera, wherein the first optical path defining element comprises a reflective structure and a slit, the reflective structure is configured to reflect light emitted by the first point light source and reflect the light to a side edge of a silicon wafer to be detected, and the light is reflected by the side edge of the silicon wafer.
System and method for enhancing defect detection in optical characterization systems using a digital filter
A system for enhancing defect detection in optical characterization systems using a digital filter is disclosed. The system may include a controller including one or more processors configured to execute a set of program instructions. The set of program instructions may be configured to cause the one or more processors to: acquire one or more sample images, the one or more sample images including one or more difference images, the one or more sample images including one or more photomask images, the one or more difference images including defect data; generate one or more filtered images by applying a digital filter to each of the one or more sample images, the digital filter including a convolution filter including one or more convolution filter coefficients; and adjust the applied digital filter using a machine learning classifier, the adjusted digital filter configured to enhance defect detection of an inspection sub-system.
Automated fault detection in microfabrication
A method including: collecting first processing tool machine data from a first processing tool while treating semiconductor substrates, the first processing tool machine data including process data and operational codes associated with one or more discrete intervals of time during the treatments, training a first neural network with the first processing tool machine data from the first processing tool, and generating a first output indicative of a fault of the first processing tool from the first neural network, based, at least in part, on applying subsequent machine data from at least one processing tool.