A method for manufacturing a semiconductor device with high productivity is provided. The method includes a step of forming a first insulator, a second insulator, and a third insulator in this order using a multi-chamber apparatus; a step of forming a fourth insulator, a fifth insulator, a first oxide film, a second oxide film, and a third oxide film in this order using a multi-chamber apparatus; a step of forming a conductive film; a step of processing the first oxide film, the second oxide film, the third oxide film, and the conductive film, thereby forming a first oxide, a second oxide, an oxide layer, and a conductive layer each having an island shape; a step of forming a sixth insulator and an insulating film in this order using a multi-chamber apparatus; a step of planarizing the insulating film; a step of forming, in the insulating film and the sixth insulator, an opening where the second oxide is exposed; a step of forming a seventh insulator and a first conductor; and a step of forming an eighth insulator and a ninth insulator in this order using a multi-chamber apparatus.

A method for manufacturing a semiconductor device includes: forming a semiconductor structure on a semiconductor substrate, the semiconductor structure including first and second source/drain regions disposed on the semiconductor substrate in a first direction and spaced apart from each other in a second direction transverse to the first direction, and a plurality of channel features disposed between and connected to the first and second source/drain regions and spaced apart from one another in the first direction; forming an interfacial material layer to cover the channel features; forming a metal oxide layer on the interfacial material layer; converting a portion of the interfacial material layer into a metal silicate layer so as to form a plurality of interfacial features respectively covering the channel features, the metal silicate layer being formed between the metal oxide layer and the interfacial features; and removing the metal oxide layer and the metal silicate layer.

The present application provides a method for improving continuity of a work function thin film, forming a tunneling oxide layer on a substrate; forming an isolation layer on the tunneling oxide layer; forming a work function thin film on the isolation layer, the work function thin film serves as a floating gate in a semi-floating gate device to store charges and conduction electrons, performing a heat treatment on the tunneling oxide layer, the isolation layer and the work function layer, the isolation layer reacts with a surface of the tunneling oxide layer to form a dense barrier layer, the isolation layer reacts with O in the tunneling oxide layer to form a new tunneling oxide layer, the heat treatment lasts until the isolation layer is fully consumed, and the work function thin film remaining after the reaction uniformly covers an upper surface of the dense barrier layer.

A method of forming a semiconductor structure includes forming a conductive structure in a first dielectric layer. A second dielectric layer is formed over the first dielectric layer. A conductive contact is formed in the second dielectric layer. The second dielectric layer is etched to form a recess on a top surface of the conductive structure. A native oxide layer is formed on a top surface and a sidewall of the second dielectric layer, the top surface of the conductive structure, and a sidewall of the conductive contact. A first plasma process is performed to form a first material layer over the native oxide layer by using a first plasma gas. A second plasma process is performed to form a second material layer over the first material layer by a second plasma gas different from the first plasma gas. A spacer layer is formed on the second material layer.

A layered structure can include a porous layer over a substrate and a thermal layer coupled to pore walls of the porous layer. The porous layer can have a higher resistivity than the substrate. A stress of the porous layer can be proportional to a variance of infrared (IR) transmission data of the porous layer. The variance of IR transmission data can be no greater than 2,500. Advantageously the thermal layer can decrease stress in the porous layer, increase thermal stability of the porous layer, decrease cracking and flaking during high temperature processing, maintain high resistivity of the porous layer, and increase the quality of the epitaxial layer and/or semiconductor devices formed using the porous layer.

Systems and methods for reducing obstructions in an exhaust line of a sub-atmospheric chemical vapor deposition (SACVD) system are disclosed. Such obstruction may occur due to the reaction of a silicon precursor with ozone, which forms solid particles in the exhaust line. A catalytic apparatus is provided which catalyzes the decomposition of ozone (O.sub.3) to oxygen (O.sub.2). Due to the lower reactivity of O.sub.2, the formation of solid particles is reduced.

The present disclosure relates to methods and apparatuses for selective deposition on a surface. In particular, a silicon-containing inhibitor can be used to selectively bind to a first region, thus inhibiting deposition of a material on that first region.

Methods of forming a silicon hardmask are disclosed. In one example, a method may include forming a silicon mask over a device layer, forming a carbon mask over the silicon mask, and forming an opening through the carbon mask. The method may further include forming an oxide layer within the opening by performing an ion implantation process to an upper surface of the silicon mask.

Examples are disclosed that relate to layered metal oxide films. One example provides a method of forming a patterning structure. The method comprises performing one or more layered film deposition cycles to form a layered film comprising a metal oxide. A layered film deposition cycle of the one or more layered deposition cycles comprises a metal oxide deposition subcycle and a silicon oxide deposition cycle. The metal oxide deposition subcycle comprises exposing the substrate to a metal-containing precursor and oxidizing metal-containing precursor adsorbed to the substrate. The silicon oxide deposition subcycle comprising exposing a substrate to a silicon-containing precursor and oxidizing silicon-containing precursor adsorbed to the substrate. The method further comprises etching one or more regions of the layered film to form the patterning structure.

A method of manufacturing a structure for power electronics which includes epitaxially growing a GaN semiconductor layer is provided. The method includes growing buffer layers formed of AlN and Al.sub.xGa.sub.(1-x)N, wherein 0<x<1, on a Si substrate before growing the semiconductor layer on the buffer layers. The method also includes growing deformation compensation layers formed of SiO.sub.2, SiC.sub.xN.sub.(1-x), SiN, SiC.sub.xO.sub.(1-x), SiC, SiN.sub.xO.sub.(1-x), Al.sub.2O.sub.3, and/or Cr.sub.2O.sub.3, wherein 0<x<1, on the substrate opposite the semiconductor layer. The deformation compensation layers compensate for deformation of the structure that occurs while growing the semiconductor and buffer layers and deformation that occurs while cooling the structure. The method further includes estimating epitaxial growth stress, interface stress, and thermal stress of the structure, and adjusting the temperature and or thickness of the layers based on the estimated epitaxial growth stress, interface stress, and/or thermal stress.