H10P50/283

Substrate processing apparatus and substrate processing method
12516242 · 2026-01-06 · ·

A substrate processing apparatus includes a substrate processing unit and a controller. The substrate processing unit is configured to perform an etching processing on one or more substrates each having a silicon nitride film and a silicon oxide film on a surface thereof with a processing liquid containing a phosphoric acid aqueous solution and a silicic acid compound. The controller is configured to control individual components of the substrate processing apparatus. The controller includes a concentration control unit configured to control a phosphoric acid concentration of the processing liquid such that etching selectivity of the silicon nitride film with respect to the silicon oxide film falls within a given range from a beginning of the etching processing to an end thereof.

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURE
20260013185 · 2026-01-08 ·

In an embodiment, a method may include forming a multi-layer stack over a substrate, the multi-layer stack having alternating layers of first semiconductor layers and second semiconductor layers. The method may also include forming first source/drain regions adjacent the first semiconductor layers and the second semiconductor layers in a first region, the first source/drain regions having a cap layer, forming a protection layer over the first source/drain regions, forming second source/drain regions adjacent the first semiconductor layers and the second semiconductor layers in a second region, removing the protection layer from over the first source/drain regions, replacing the first semiconductor layers in the first region with a first metal gate structure, and replacing the first semiconductor layers in the second region with a second metal gate structure.

SELECTIVE DEPOSITION ON AN EXISTING PATTERNED MASK
20260011555 · 2026-01-08 ·

A method for processing a substrate includes receiving the substrate on a substrate holder disposed in a processing chamber, the substrate including a layer to be processed and a patterned mask disposed over the layer to be processed. The method further includes flowing a processing gas into the processing chamber, and replacing a material of the patterned mask with a metal of the processing gas to form a metal patterned mask occupying a same location as the patterned mask. And the method further includes etching, using the metal patterned mask as an etch mask, the layer to be processed to form a patterned layer, the patterned layer including feature openings.

CHEMICAL ETCH USING SELECTIVE ION IMPLANTATION
20260011570 · 2026-01-08 ·

A method of chemically etching an underlying material includes selectively modifying the underlying material (e.g., a silicon-containing material, like silicon carbide) using lightweight ions (e.g., hydrogen ions, helium ions, etc.) to form a modified region of the underlying material and chemically etching the modified region using a halogen-containing etchant gas (e.g., a fluorine-containing gas, like sulfur hexafluoride). The underlying material is exposed through openings in a resist layer, which may contain carbon and/or a metal, such as a chemically amplified resist or a metal oxide resist. The selective modification step may implant the lightweight ions into the underlying material. Plasma may be used during one or both of the selective modification step and the chemical etching step. Bias power may be applied during the selective modification step and may be higher than bias power applied during the chemical etching step, which may be zero.

INSULATING PLUG IN BACKSIDE POWER DELIVERY NETWORK

A semiconductor device includes a shallow trench isolation (STI), a first well region connected to the insulating region and the STI on a first side, a second well region connected to the insulating region and the STI on a second side, and a backside contact including an upper portion, a lower portion, and a middle portion connecting the upper portion and the lower portion. A shape and a profile of the insulating region is same as a shape and a profile of the middle portion.

DRY ETCHING WITH ETCH BYPRODUCT SELF-CLEANING

An etch chamber includes a substrate support assembly for holding a base structure, and a showerhead comprising a plurality of gas delivery holes for delivering thionyl chloride. The etch chamber is configured to dry etch a target layer of the base structure at a sub-zero degree Celsius temperature using the thionyl chloride delivered by the showerhead in order to obtain a processed base structure. The processed base structure includes a plurality of features and a plurality of openings defined by an etch mask disposed on the target layer.

SELECTIVE REMOVAL OF SEMICONDUCTOR FINS
20260013208 · 2026-01-08 ·

An array of semiconductor fins is formed on a top surface of a substrate. A dielectric material liner is formed on the surfaces of the array of semiconductor fins. A photoresist layer is applied and patterned such that sidewalls of an opening in the photoresist layer are parallel to the lengthwise direction of the semiconductor fins, and are asymmetrically laterally offset from a lengthwise direction passing through the center of mass of a semiconductor fin to be subsequently removed. An angled ion implantation is performed to convert a top portion of dielectric material liner into a compound material portion. The compound material portion is removed selective to the remaining dielectric material liner, and the physically exposed semiconductor fin can be removed by an etch or converted into a dielectric material portion by a conversion process. The dielectric material liner can be removed after removal of the semiconductor fin.

SEMICONDUCTOR STRUCTURE WITH SOURCE/DRAIN MULTI-LAYER STRUCTURE AND METHOD FOR FORMING THE SAME

A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure formed over first and second fin structures, and a gate spacer layer formed on a sidewall surface of the gate structure. The semiconductor structure includes a first source/drain (S/D) epitaxial structure formed adjacent to the gate structure in the first fin structure. The S/D epitaxial structure comprises first and second S/D epitaxial layers. The semiconductor structure may include a second S/D epitaxial structure formed adjacent to the gate structure in the second fin structure. A contact structure may be formed over the first and second S/D epitaxial structures.

ETCHING METHOD AND ETCHING APPARATUS
20260011567 · 2026-01-08 ·

An etching method includes: etching a silicon oxide film by supplying a halogen-containing gas, an ammonia gas, and an amine gas as etching gases to a substrate including the silicon oxide film formed on a surface of the substrate.

ETCHING METHOD, ETCHING APPARATUS, AND RECORDING MEDIUM

An etching method includes: supplying each of a first etching gas and a second etching gas that includes at least one selected from the group of an ammonia gas and an amine gas from a gas supply source to a gas supply path; storing the first etching gas and the second etching gas in a reservoir provided in the gas supply path to increase an internal pressure of the reservoir; and supplying the first etching gas and the second etching gas, stored in the reservoir, to a processing container in which a substrate is accommodated by opening a valve provided downstream of the reservoir in the gas supply path, thus etching a first film formed on the substrate.