SELECTIVE DEPOSITION ON AN EXISTING PATTERNED MASK
20260011555 ยท 2026-01-08
Inventors
Cpc classification
H10P76/4085
ELECTRICITY
C23C16/4408
CHEMISTRY; METALLURGY
C23C16/52
CHEMISTRY; METALLURGY
C23C16/4586
CHEMISTRY; METALLURGY
International classification
C23C16/04
CHEMISTRY; METALLURGY
C23C16/458
CHEMISTRY; METALLURGY
C23C16/52
CHEMISTRY; METALLURGY
H01L21/311
ELECTRICITY
H01L21/67
ELECTRICITY
Abstract
A method for processing a substrate includes receiving the substrate on a substrate holder disposed in a processing chamber, the substrate including a layer to be processed and a patterned mask disposed over the layer to be processed. The method further includes flowing a processing gas into the processing chamber, and replacing a material of the patterned mask with a metal of the processing gas to form a metal patterned mask occupying a same location as the patterned mask. And the method further includes etching, using the metal patterned mask as an etch mask, the layer to be processed to form a patterned layer, the patterned layer including feature openings.
Claims
1. A method for processing a substrate, the method comprising: receiving the substrate on a substrate holder disposed in a processing chamber, the substrate comprising a layer to be processed and a patterned mask disposed over the layer to be processed; flowing a processing gas into the processing chamber; replacing a material of the patterned mask with a metal of the processing gas to form a metal patterned mask occupying a same location as the patterned mask; and etching, using the metal patterned mask as an etch mask, the layer to be processed to form a patterned layer, the patterned layer comprising feature openings.
2. The method of claim 1, wherein the processing gas is WF.sub.6, the layer to be processed is SiO.sub.2, the patterned mask is amorphous silicon (a-Si), the metal of the processing gas is tungsten, and the metal patterned mask is tungsten.
3. The method of claim 2, wherein replacing the material of the patterned mask replaces the material of the patterned mask using a replacement reaction with the processing gas, the replacement reaction is 2WF.sub.6(g)+3Si(s).fwdarw.2 W(s)+3SiF.sub.4(g).
4. The method of claim 1, wherein replacing the material of the patterned mask replaces an outer portion of the patterned mask to form the metal patterned mask with a core of the material of the patterned mask.
5. The method of claim 1, wherein replacing the material of the patterned mask completely replaces the material of the patterned mask to form the metal patterned mask occupying the same location as the patterned mask.
6. The method of claim 1, wherein the processing gas is ignited into a plasma to perform the replacing and the etching without modifying the plasma or the processing gas.
7. The method of claim 1, further comprising: filling the feature openings with conductive material to form features.
8. The method of claim 7, wherein the feature openings are capacitor holes, and the features are capacitors.
9. The method of claim 7, wherein the feature openings are channel holes.
10. A method for processing a substrate, the method comprising: receiving the substrate on a substrate holder disposed in a processing chamber, the substrate comprising a dielectric layer and a patterned amorphous silicon (a-Si) layer disposed over the dielectric layer; flowing a WF.sub.6 gas into the processing chamber; igniting the WF.sub.6 gas into a plasma; replacing silicon of the patterned a-Si layer with tungsten using the plasma to form a patterned tungsten layer in a same location as the patterned a-Si layer; and etching, using the patterned tungsten layer as an etch mask, the dielectric layer to form channel holes.
11. The method of claim 10, further comprising: filling the channel holes with conductive material to form channels.
12. The method of claim 10, wherein the dielectric layer is SiO.sub.2.
13. The method of claim 10, wherein replacing silicon of the patterned a-Si layer with tungsten using the plasma to form the patterned tungsten layer replaces an outer portion of the patterned a-Si layer to form the patterned tungsten layer with a core remaining from the a-Si layer.
14. The method of claim 10, wherein replacing silicon of the patterned a-Si layer with tungsten using the plasma to form the patterned tungsten layer replaces all of the patterned a-Si layer to form the patterned tungsten layer of tungsten.
15. A system for processing a substrate, the system comprising: a substrate holder disposed in a processing chamber; a gas inlet path coupled to a gas shower head of the processing chamber; a radio-frequency (RF) power source electrically coupled to the substrate holder; and a controller electrically coupled to the gas inlet path, the RF power source, and a memory storing instructions to be executed in the controller, the instructions when executed cause the controller to: receive the substrate on the substrate holder, the substrate comprising a dielectric layer and a patterned amorphous silicon (a-Si) layer disposed over the dielectric layer; flow a WF.sub.6 gas through the gas shower head into the processing chamber; ignite, using an RF power generated by the RF power source and applied to the substrate holder, the WF.sub.6 gas into a plasma; replace silicon of the patterned a-Si layer with tungsten using the plasma to form a patterned tungsten layer in a same location as the patterned a-Si layer; and etch, using the patterned tungsten layer as an etch mask, the dielectric layer to form channel holes.
16. The system of claim 15, wherein the substrate holder is an electrostatic chuck (ESC), and the dielectric layer is SiO.sub.2.
17. The system of claim 15, wherein the processing chamber is a reactive ion etching (RIE) chamber.
18. The system of claim 15, wherein the processing chamber is a chemical vapor deposition (CVD) chamber.
19. The system of claim 15, wherein the processing chamber is a plasma enhanced chemical vapor deposition (PECVD) chamber.
20. The system of claim 15, further comprising: vacuum pumps coupled to the processing chamber, the vacuum pumps configured to remove exhaust gases or gaseous byproducts from the processing chamber.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
[0009]
[0010]
[0011]
[0012]
[0013]
DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
[0014] Semiconductor devices are commonly fabricated by creating patterns on silicon wafers or other substrates, and transferring those patterns to form various electrical components. Hard masks play a crucial role in patterning because they are used to define these regions with precision. They are resistant to etchants and other chemicals that remove unprotected areas of a substrate during patterning processes, making them invaluable for high-resolution definition.
[0015] Presently, hard masks are typically made of durable materials such as silicon nitride, silicon carbide, various metal nitrides, and other refractory compounds. These materials allow for them to withstand the harsh conditions present during etching or ion implantation. However, the process of modifying the properties of these hard masks presents a significant challenge. Conventional techniques may include dry etching or wet chemical processes, but these approaches often suffer from issues of non-uniformity, over-eroding, difficulty in controlling reaction endpoints, and damage to underlying layers.
[0016] Furthermore, traditional methods utilize tight process controls and multiple complex steps that increase processing time, complexity, and cost. As semiconductor devices become progressively smaller and more intricate, there is an ever-increasing demand for methods that can offer greater precision in the modification of hard masks. Specifically, controlled adjustments to the composition, thickness, and other properties of a hard mask at a microscopic level are desired to keep pace with the miniaturization of semiconductor device features.
[0017] Self-limited reactions have garnered interest as they naturally cease once the reactive species have been consumed or a passivating layer has been formed, providing an inherent endpoint to the reaction. Unfortunately, incorporating self-limiting reaction mechanisms into the modification of hard masks is challenging due to the difficult balance of reactive behavior with existing material properties.
[0018] The proposed methods and systems of this disclosure provide an improved technique for modifying hard masks by implementing a self-limiting replacement reaction. This approach enables precise control over the modification process, avoiding over-etching and enabling uniform alteration of the hard mask properties without compromising the integrity of the underlying layers. By overcoming limitations of conventional methods and introducing a novel approach that harnesses self-limiting behavior, this technology may improve the fidelity and efficiency of semiconductor patterning processes.
[0019] High aspect ratio contact (HARC) etch processes that use amorphous carbon layers (ACLs) and/or a-Si as the etch mask are not sufficiently selective, which is a limiting factor in conventional HARC etch processes. As an attempt to ameliorate the difficulty of poor selectivity from a-Si and ACL etch masks, methods have been proposed which use tungsten as the etch mask. Unfortunately, tungsten etch masks are difficult to pattern. And as a further difficulty, conventional methods form tungsten films with high stress. As a result, the high stresses increase the chance of wafer bow being out of spec.
[0020] This disclosure describes embodiment methods of processing a substrate by using a replacement reaction induced through the exposure of the substrate to a processing gas to replace a patterned mask with a new material to form a hard mask with a higher selectivity than the conventional a-Si or ACL masks. As a result, the processing method of this disclosure may prevent high stresses through tungsten mask deposition and lithography steps.
[0021] The processing method of this disclosure enables the direct replacement of a patterned mask with tungsten without requiring additional lithography, etching, or planarization steps. And by replacing the a-Si mask with tungsten through the replacement reaction, the new hard mask comprising tungsten is formed in place of the a-Si mask in the same location and comprising the same patterning, which avoids the difficulties which may arise through processes to pattern the tungsten hard mask. Rather, the replacement reaction forms the tungsten hard mask already patterned. And further, HARC etch processes may be enabled by using the tungsten hard mask through the implementation of the processing method of this disclosure while avoiding the difficulties described above when using conventional a-Si or ACL masks.
[0022] Embodiments provided below describe various methods, apparatuses and systems of processing a substrate, and in particular, to methods, apparatuses, and systems that use a replacement reaction to enable the modification of a patterned mask to form a modified patterned mask which may be used in further processing steps. The following description describes the embodiments.
[0023]
[0024]
[0025] In various embodiments, the substrate 110 may be any substrate known in the art suitable for fabricating the electronic device 100. For example, the substrate 110 may be any suitable substrate for which processing using the processing method of this disclosure is desired. Specifically, the substrate 110 may be any suitable substrate which may have material of a mask replaced through exposure to a processing gas. In various embodiments, the substrate 110 is a wafer and is a silicon wafer in one embodiment. More possible substrates include flat panel displays, photolithography masks, and others. Although many substrates are circular, there is no requirement that the substrate 110 be circular or even substantially circular. For example, the substrate 110 may be circular, square, rectangular, or any other desired shape including irregular shapes.
[0026] The underlying layer 120 may be formed via suitable methods known in the art. In various embodiments, the underlying layer 120 may be a barrier layer to prevent diffusion of material. In other embodiments, the underlying layer 120 may comprise a variety of electrical components formed before depositing the dielectric layer 130 over the underlying layer 120. For example, the underlying layer 120 may be an underlying integrated circuit (IC) formed through conventional methods, and the processing method that replaces material of a mask layer through the use of a processing gas of this disclosure may be used to form channel holes through the dielectric layer 130 to the underlying ICs of the underlying layer 120.
[0027] The dielectric layer 130 may be formed via suitable methods known in the art. In various embodiments, the dielectric layer 130 may be a SiO.sub.2 layer formed through conventional methods, such as through chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), or etcetera. In other embodiments, the dielectric layer 130 may be any material suitable for forming the electronic device 100 such that materials of the processing gas used in the processing method of this disclosure do not react with the dielectric layer 130.
[0028] After receiving the electronic device 100 on a substrate holder of a processing system (such as processing system 30 described using
[0029]
[0030] In various embodiments, the mask 140 is amorphous silicon (a-Si). Further, the mask 140 may be any suitable material capable of reacting with a processing gas in a replacement reaction that replaces the material of the mask 140 with material from the processing gas in accordance with the processing method of this disclosure. After depositing the mask 140 over the dielectric layer 130, the mask 140 may be patterned with a feature pattern in accordance with a processing recipe to form the electronic device 100, such as described using
[0031]
[0032] In various embodiments, the openings 145 may be formed to be used to etch various different HARC features, such as pillars, channel holes, capacitor holes, and/or plugs. The mask 140 may be formed with a mask thickness (h), and the openings 145 may be formed in accordance with a processing recipe that specifies a feature pattern with a critical dimension (CD) and a pitch (w). The mask 140 illustrated in
[0033] After forming the openings 145, or in other words patterning the mask 140, the processing method may expose the mask 140 to a processing gas to cause replacement reactions between the material of the mask 140 and the processing gas. As a result, the patterned mask 140 is replaced to form a new hard mask comprising the same feature pattern (and openings 145) and comprising material that enables a higher selectivity than the mask 140, such as described using
[0034]
[0035] In an embodiment where the processing gas is WF.sub.6, the dielectric layer 130 is SiO.sub.2, and the mask 140 is a-Si, the replacement reaction may replace silicon of the mask 140 with tungsten (W) from the processing gas according to the reaction equation: 2WF.sub.6(g)+3Si(s).fwdarw.2W(s)+3SiF.sub.4(g). And thus, the hard mask 150 comprises tungsten. The hard mask 150 may be referred to as a patterned hard mask, or a metal patterned mask depending on the materials of the various embodiments.
[0036] The openings 145 in the hard mask 150 may remain the same dimensions and in the same location as they were in the mask 140. In other embodiments, the dimensions may vary after the replacement reaction. To prevent dimensional variation, processing methods may correspondingly pattern the openings 145 in the mask 140 in a manner such that after the replacement reaction, the openings 145 in the hard mask 150 are of the desired dimensions and location.
[0037] In various embodiments, the sizes of the dimensions of the openings 145 are such as desired for the features being formed in the electronic device 100. For example, the pitch (w) may be between about 10 nm and about 50 nm. Further, the CD may be between about 3 nm and about 25 nm. The mask thickness (h) may be any suitable thickness sufficient for etching the desired features in the dielectric layer 120 without penetrating through the hard mask 150 such as between about 100 nm and about 1000 nm. In various embodiments, the openings 145 may be capacitor holes used to form capacitors (the features). After forming the hard mask 150, the processing method uses the hard mask 150 as an etch mask to etch features according to the feature pattern (openings 145) into the dielectric layer 130, such as described using
[0038]
[0039] And the electronic device 100 may be any device whose fabrication techniques may benefit through the processing method of this disclosure. For example, the processing method of this disclosure may be implemented in the fabrication of dynamic random access memory (DRAM) devices, and the electronic device 100 may be a DRAM device.
[0040] In contrast to the embodiment illustrated in
[0041]
[0042] As illustrated in
[0043] In various embodiments, the penetration depth (a) may be varied/controlled through changes in processing parameters, such as temperature or exposure time. As a result, control of the penetration depth (a) may enable other selective deposition methods to form features confined within the hard mask 250, which may be subsequently removed through suitable methods and leave the core 240. Some embodiments may dynamically vary the processing parameters to control the penetration depth (a).
[0044] An embodiment processing system capable of implementing the embodiment processing methods described using
[0045]
[0046] For illustrative purposes,
[0047] In embodiments where the substrate holder 310 is an ESC, the ESC may be coated with a conductive material (e.g., a carbon-based or metal-nitride based coating) to enable the formation of electrical connections with the substrate holder 310. Further, the processing system 30 may be capable of implementing the processing method of this disclosure to process the substrate 300, which may be substrate 110 of
[0048] Process gases may be introduced into the processing chamber 320 by a gas delivery system 370. The gas delivery system 370 comprises multiple gas flow controllers to control the flow of multiple gases into the chamber in various embodiments. Each of the gas flow controllers of the gas delivery system 370 may be assigned for each of fluorocarbons, noble gases, and/or balancing agents. In some embodiments, optional center/edge splitters may be used to independently adjust the gas flow rates at the center and edge of the substrate 300. The process gases or any exhaust gases or any gaseous byproducts from the replacement reaction (such as SiF.sub.4) may be evacuated from the processing chamber 320 using the vacuum pumps 380. In other embodiments, a single processing gas may be introduced into the processing chamber 320, such as WF.sub.6. And in those embodiments, the gas delivery system 370 comprises a single gas flow controller to control the flow of the lone processing gas used to implement the processing method of this disclosure.
[0049] As illustrated in
[0050] In various embodiments, the processing chamber 320 may be any suitable chamber for processing the substrate 300 using the processing method of this disclosure. For example, the processing chamber 320 may be an etch chamber configured to etch material from the substrate 300 (such as a reactive ion etch (RIE) chamber), or a deposition chamber configured to deposit material over the substrate 300 (such as a CVD or PECVD chamber). In embodiments where the processing chamber 320 is a PECVD chamber, the processing chamber 320 may be configured to ignite the processing gas into a plasma 360 by using the RF power source 340 to apply a signal to the substrate holder 310.
[0051] Still referring to
[0052] In various embodiments, the controller 390 is configured to enable control of the processing system 30, for example, by implementing the processing methods of this disclosure to use a processing gas to replace materials of a patterned mask with a new material to form a hard mask with high selectivity which enables HARC feature formation. The controller 390 may comprise a function generator including an appropriate digital and/or analog circuitry such as oscillators, pulse generators, modulators, combiners, and the like. The function generator is capable of generating one or more arbitrary waveforms that may be used for power modulation of the RF power source 340. In certain embodiments, some of the power modulation may be performed by the RF power source 340 itself instead of the function generator. In such cases, the function generator may generate a pulse train synchronized with the power modulation by the RF power source 340. In certain embodiments, although not illustrated, additional components (e.g., a broadband amplifier and a broadband impedance matching network) may be connected to the RF power source 340.
[0053] In certain embodiments, power sources may comprise a DC power source. The RF and/or DC power sources (e.g., the RF power source 340) may be configured to generate a continuous wave (CW) RF, pulsed RF, DC, pulsed DC, a high frequency rectangular (e.g., square wave) or triangular (e.g., sawtooth) pulse train, or a combination or superposition of more than one such waveform. In addition, power sources may be configured to generate a periodic function, for example, a sinusoid whose characteristics such as amplitude and frequency may be adjusted during the processing of the substrate 300. A typical frequency for the RF power source 340 can range from about 0.1 MHz to about 6 GHz. And a common frequency applied to the substrate holder 310 by the RF power source 340 to ignite the processing gas is 13.56 MHz.
[0054] Various configurations may be used for the processing system 30 that is configured to form a patterned hard mask by exposing a patterned mask (such as a-Si) to a processing gas (such as WF.sub.6) to replace the material of the patterned mask with a new material of the processing gas through a replacement reaction. For example, the processing system 30 may be an RIE in the form of a capacitively coupled plasma (CCP) system, such as illustrated in
[0055] Still referring to
[0056] The controller 390 may be any suitable device capable of executing the processing method of this disclosure. The controller 390 may be coupled to the processing chamber 320, the vacuum pumps 380, the RF power source 340, the gas delivery system 370, the substrate holder 310, and the memory 395 storing instructions to be executed in the controller 390. By controlling the gas delivery system 370 to inject the processing gas into the processing chamber 320, and by controlling the processing chamber 320 and the substrate holder 310 to hold the substrate 300 and process the substrate 300 using the RF power source 340 to ignite the processing gas into the plasma 360 to replace the mask and form a patterned hard mask over a layer to be etched of the substrate 300, the controller 390 may implement the processing method of this disclosure. In various embodiments, the controller 390 may be an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a microcontroller (MCU), or some form of programmable logic circuit (PLC). The controller 390 is capable of implementing the embodiment processing methods of this disclosure, such as method 400 and method 500 described using the flowchart of
[0057]
[0058]
[0059] Referring to
[0060] Once the substrate is loaded on the substrate holder within the processing chamber, step 420 of the method 400 flows a processing gas into the processing chamber. For example, in an embodiment, the processing gas may comprise WF.sub.6 and flow into the processing chamber using a gas delivery system, such as gas delivery system 370 of
[0061] Still referring to
[0062] A change in volume of the metal patterned mask in comparison to the patterned mask it replaced may be prevented by accounting for dimension changes in the processing recipe and the original patterning of the patterned mask. For example, processing recipes that may result in the dimensions of the feature patterns changing through the replacement reaction may account for potential dimensional changes by specifying a different dimension for the feature pattern of the patterned mask. Consequently, the replacement reaction adjusts the dimensions and forms a metal patterned mask comprising feature patterns of desired dimensions.
[0063] In various embodiments, the patterned mask may be completely replaced through the replacement reaction to form the metal patterned mask, such as illustrated in
[0064] After forming the metal patterned mask in step 430, the method 400 has formed a metal patterned mask over the layer to be patterned, where the metal patterned mask comprises a feature pattern (openings) which may be used to form features in subsequent etch steps. Additionally, as a benefit of the method of this disclosure, the metal patterned mask has higher selectivity than the patterned mask and enables HARC etching. The method 400 may further perform etching steps (using the metal patterned mask as an etch mask) to form HARC features, and subsequent metal fills or other processing steps may be performed to finish fabricating an electronic device (such as a semiconductor device).
[0065] After forming the metal patterned mask in step 430, the method 400 may proceed to step 440. In step 440, the method 400 etches, using the metal patterned mask as an etch mask, the layer to be processed to form a patterned layer. The patterned layer comprises feature openings, which may be further processed to form channels, plugs, pillars, or other conventional feature known in the art with a high aspect ratio (HAR). In various embodiments, step 440 may be illustrated by the electronic device 100 of
[0066] As an additional example, another embodiment processing method which uses a processing gas to replace material of a patterned mask with a new material from the processing gas in a replacement reaction is described using the flowchart of
[0067]
[0068] Referring to
[0069] Once the substrate is loaded on the substrate holder within the processing chamber, step 520 of the method 500 flows a WF.sub.6 gas into the processing chamber. In an embodiment, the flowing of the WF.sub.6 gas may be performed by the gas delivery system 370 through the gas inlet path 355 of
[0070] Still referring to
[0071] Step 540 of the method 500 exposes the patterned a-Si layer to the plasma. By exposing the patterned a-Si layer to the plasma, the plasma reacts through a replacement reaction with silicon of the patterned a-Si layer. And as a result, the plasma replaces silicon of the patterned a-Si layer with tungsten from the WF.sub.6 gas which was ignited into the plasma, and forms a patterned tungsten layer.
[0072] In various embodiments, the patterned tungsten layer completely replaces the patterned a-Si layer, and comprises the same dimensions and occupies the same location as the patterned a-Si layer. In other embodiments, the patterned tungsten layer partially replaces the patterned a-Si layer up to a penetration depth (hence self-limiting), and thus comprises a core of a-Si which was not replaced in the replacement reaction. In some embodiments, the patterned a-Si layer may be the mask 140 of
[0073] The method 500 may be implemented in a suitable processing system, such as a PECVD, or a RIE system. Again, the method 500 may perform additional processing steps after forming the patterned tungsten layer, such as by using the patterned tungsten layer as an etch mask in an etch process to form features according to the feature pattern of the patterned tungsten layer. Further, the tungsten enables high selectivity and thus HARC etch processes, which are benefits of the systems and methods of this disclosure.
[0074] After forming the patterned tungsten layer in step 540, the method 500 proceeds to step 550. In step 550, the method 500 etches, using the patterned tungsten layer as an etch mask, the dielectric layer to form channel holes. In various embodiments, step 550 may be illustrated by the electronic device 100 of
[0075] In other embodiments, different conventional feature openings may be formed through the etch process according to the processing recipe and feature pattern in the patterned tungsten layer. For example, plugs, pillars, or other suitable features comprising HAR may be etched due to the improved selectivity through the replacement of the patterned a-Si layer with the tungsten in accordance with the methods of this disclosure. Further processing steps may be performed to finish forming the channel holes, such as filling the channel holes with conductive material to form channels to an underlying integrated circuit in the substrate. Additionally, in various embodiments, the channel holes may be capacitor holes that are used to form capacitors in further processing steps.
[0076] Example embodiments of the invention are described below. Other embodiments can also be understood from the entirety of the specification as well as the claims filed herein.
[0077] Example 1. A method for processing a substrate includes receiving the substrate on a substrate holder disposed in a processing chamber, the substrate including a layer to be processed and a patterned mask disposed over the layer to be processed. The method further includes flowing a processing gas into the processing chamber, and replacing a material of the patterned mask with a metal of the processing gas to form a metal patterned mask occupying a same location as the patterned mask. And the method further includes etching, using the metal patterned mask as an etch mask, the layer to be processed to form a patterned layer, the patterned layer including feature openings.
[0078] Example 2. The method of example 1, where the processing gas is WF.sub.6, the layer to be processed is SiO.sub.2, the patterned mask is amorphous silicon (a-Si), the metal of the processing gas is tungsten, and the metal patterned mask is tungsten.
[0079] Example 3. The method of one of examples 1 or 2, where replacing the material of the patterned mask replaces the material of the patterned mask using a replacement reaction with the processing gas, the replacement reaction is 2WF.sub.6(g)+3Si(s).fwdarw.2 W(s)+3SiF.sub.4(g).
[0080] Example 4. The method of one of examples 1 to 3, where replacing the material of the patterned mask replaces an outer portion of the patterned mask to form the metal patterned mask with a core of the material of the patterned mask.
[0081] Example 5. The method of one of examples 1 to 4, where replacing the material of the patterned mask completely replaces the material of the patterned mask to form the metal patterned mask occupying the same location as the patterned mask.
[0082] Example 6. The method of one of examples 1 to 5, where the processing gas is ignited into a plasma to perform the replacing and the etching without modifying the plasma or the processing gas.
[0083] Example 7. The method of one of examples 1 to 6, further includes filling the feature openings with conductive material to form features.
[0084] Example 8. The method of one of examples 1 to 7, where the feature openings are capacitor holes, and the features are capacitors.
[0085] Example 9. The method of one of examples 1 to 8, where the feature openings are channel holes.
[0086] Example 10. A method for processing a substrate includes receiving the substrate on a substrate holder disposed in a processing chamber, the substrate including a dielectric layer and a patterned amorphous silicon (a-Si) layer disposed over the dielectric layer. The method further includes flowing a WF.sub.6 gas into the processing chamber, and igniting the WF.sub.6 gas into a plasma. The method further includes replacing silicon of the patterned a-Si layer with tungsten using the plasma to form a patterned tungsten layer in a same location as the patterned a-Si layer. And the method further includes etching, using the patterned tungsten layer as an etch mask, the dielectric layer to form channel holes.
[0087] Example 11. The method of example 10, further includes filling the channel holes with conductive material to form channels.
[0088] Example 12. The method of one of examples 10 or 11, where the dielectric layer is SiO.sub.2.
[0089] Example 13. The method of one of examples 10 to 12, where replacing silicon of the patterned a-Si layer with tungsten using the plasma to form the patterned tungsten layer replaces an outer portion of the patterned a-Si layer to form the patterned tungsten layer with a core remaining from the a-Si layer.
[0090] Example 14. The method of one of examples 10 to 13, where replacing silicon of the patterned a-Si layer with tungsten using the plasma to form the patterned tungsten layer replaces all of the patterned a-Si layer to form the patterned tungsten layer of tungsten.
[0091] Example 15. A system for processing a substrate includes a substrate holder disposed in a processing chamber, a gas inlet path coupled to a gas shower head of the processing chamber, a radio-frequency (RF) power source electrically coupled to the substrate holder, and a controller electrically coupled to the gas inlet path, the RF power source, and a memory storing instructions to be executed in the controller. The instructions when executed cause the controller to receive the substrate on the substrate holder, the substrate including a dielectric layer and a patterned amorphous silicon (a-Si) layer disposed over the dielectric layer. The instructions when executed further cause the controller to flow a WF.sub.6 gas through the gas shower head into the processing chamber, and ignite, using an RF power generated by the RF power source and applied to the substrate holder, the WF.sub.6 gas into a plasma. The instructions when executed further cause the controller to replace silicon of the patterned a-Si layer with tungsten using the plasma to form a patterned tungsten layer in a same location as the patterned a-Si layer, and etch, using the patterned tungsten layer as an etch mask, the dielectric layer to form channel holes.
[0092] Example 16. The system of example 15, where the substrate holder is an electrostatic chuck (ESC), and the dielectric layer is SiO.sub.2.
[0093] Example 17. The system of one of examples 15 or 16, where the processing chamber is a reactive ion etching (RIE) chamber.
[0094] Example 18. The system of one of examples 15 to 17, where the processing chamber is a chemical vapor deposition (CVD) chamber.
[0095] Example 19. The system of one of examples 15 to 18, where the processing chamber is a plasma enhanced chemical vapor deposition (PECVD) chamber.
[0096] Example 20. The system of one of examples 15 to 19, further includes vacuum pumps coupled to the processing chamber, the vacuum pumps configured to remove exhaust gases or gaseous byproducts from the processing chamber.
[0097] While this invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments.