H10P14/6308

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
20260047359 · 2026-02-12 ·

A method for manufacturing a semiconductor device according to an embodiment has a first film formation step, a second film formation step, and an oxidizing step. In the first film formation step, a first coating film made of silicon is formed on a surface of a base material made of silicon carbide. In the second film formation step, a second coating film is formed on a surface of the first coating film. In the oxidizing step, the first coating film is thermally oxidized from a surface side to form a third coating film. In the second film formation step, on a part of the first coating film, the second coating film is not formed, and the part is exposed. Alternatively, in the second film formation step, a film thickness of the second coating film formed on the part of the first coating film is smaller than a film thickness of the second coating film formed on a different part.

SELECTIVE ETCHING BETWEEN SILICON-AND-GERMANIUM-CONTAINING MATERIALS WITH VARYING GERMANIUM CONCENTRATIONS

Exemplary semiconductor processing methods may include providing a pre-treatment precursor to a processing region of a semiconductor processing chamber. A substrate may be housed having a first layer of silicon-and-germanium-containing material and a second layer of silicon-and-germanium-containing material may be housed within the processing region. A native oxide may be present. The methods may include contacting the substrate with the pre-treatment precursor to remove the native oxide. The methods may include contacting the substrate with an oxygen-containing precursor to oxidize at least a portion of the first layer of silicon-and-germanium-containing material and at least a portion of the second layer of silicon-and-germanium-containing material. The methods may include contacting the substrate with an etchant precursor to selectively etch the first layer of silicon-and-germanium-containing material.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
20260068206 · 2026-03-05 · ·

A method of manufacturing a semiconductor device includes: preparing semiconductor substrate having a front surface and a back surface opposite to each other, the semiconductor substrate being of a first conductivity type; forming a device structure in the semiconductor substrate, at the front surface; performing thermal oxidation to form a gate insulating film and depositing a polysilicon to form a plurality of gate electrodes; removing the polysilicon at the back surface of the semiconductor substrate while leaving an oxide film formed at the back surface and a side surface of the semiconductor substrate by the thermal oxidation; forming a surface electrode on the device structure; and forming a plating film on the surface electrode while continuing to leave the oxide film at the back surface and the side surface of the semiconductor substrate.

Semiconductor device and manufacturing method thereof
12575390 · 2026-03-10 · ·

There is provided a diode including an anode electrode provided on a side of a front surface of a semiconductor substrate, an interlayer dielectric film disposed between the semiconductor substrate and the anode electrode, a first anode region of a first conductivity type provided on the front surface of the semiconductor substrate, a second anode region of a second conductivity type, which is different from the first conductivity type, provided on the front surface of the semiconductor substrate, a first contact hole provided in the interlayer dielectric film, causing the anode electrode to be in Schottky contact with the first anode region, and a second contact hole provided in the interlayer dielectric film and different from the first contact hole, causing the anode electrode to be in ohmic contact with the second anode region.

NANOSTRUCTURE FIELD-EFFECT TRANSISTOR DEVICE AND METHOD OF FORMING
20260075925 · 2026-03-12 ·

A method of forming a semiconductor device includes: forming, in a first device region of the semiconductor device, first nanostructures over a first fin that protrudes above a substrate; forming, in a second device region of the semiconductor device, second nanostructures over a second fin that protrudes above the substrate, where the first and the second nanostructures include a semiconductor material and extend parallel to an upper surface of the substrate; forming a dielectric material around the first and the second nanostructures; forming a first hard mask layer in the first device region around the first nanostructures and in the second device region around the second nanostructures; removing the first hard mask layer from the second device region after forming the first hard mask layer; and after removing the first hard mask layer, increasing a first thickness of the dielectric material around the second nanostructures by performing an oxidization process.

Fabrication of silicon germanium channel and silicon/silicon germanium dual channel field-effect transistors

A method for manufacturing a semiconductor device includes forming a plurality of fins on a substrate, wherein each fin of the plurality of fins includes silicon germanium. A layer of silicon germanium oxide is deposited on the plurality of fins, and a first thermal annealing process is performed to convert outer regions of the plurality of fins into a plurality of silicon portions. Each silicon portion of the plurality of silicon portions is formed on a silicon germanium core portion. The method further includes forming a plurality of source/drain regions on the substrate, and depositing a layer of germanium oxide on the plurality of source/drain regions. A second thermal annealing process is performed to convert outer regions of the plurality of source/drain regions into a plurality of germanium condensed portions.

Method for preparing silicon-on-insulator

In a method for preparing silicon-on-insulator, the first etching stop layer, the second etching stop layer, and the device layer are formed bottom-up on the p-type monocrystalline silicon epitaxial substrate, where the first etching stop layer is made of intrinsic silicon, the second etching stop layer is made of germanium-silicon alloy, and the device layer is made of silicon. After oxidation, bonding, reinforcement, and grinding treatment, selective etching is performed. Through a first selective etching to p+/intrinsic silicon, the thickness deviation of the first etching stop layer on the second etching layer is controlled within 100 nm, and then through the second etching and the third etching, the thickness deviation and the surface roughness of the finally prepared silicon-on-insulator film can be optimized to less than 5 nm and less than 4 , respectively, so as to realize the flatness of the silicon-on-insulator film.

Film formation method and plasma processing method
12610757 · 2026-04-21 · ·

To enable formation of a film that protects a sidewall of a pattern and is good in film quality, low in etching rate, and good in coverage of the sidewall, a film formation method includes a first step of supplying a gas into a vacuum processing chamber while generating plasma, and forming a film with the generated plasma on a surface of a substrate to be processed, a second step of removing halogen with plasma after the first step, and a third step of oxidizing or nitriding the film with plasma after the second step.

Power device and method for manufacturing the same

A power device and a method for manufacturing the power device are provided. The power device includes an electrical substrate, an epitaxial layer, a well region, a plurality of doping regions, a plurality of trenches, a first oxidation layer, a second oxidation layer, a polycrystalline silicon filler, two shielding regions, a dielectric layer, and a metallic electrically conductive layer.

Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device includes forming a gate oxide layer on a substrate, where the substrate includes a high voltage region and a low voltage region. The gate oxide layer is disposed in the high voltage region. Wet etching is performed on the gate oxide layer to reduce a thickness of the gate oxide layer. Multiple trenches are formed around the high voltage region in the substrate, where forming the trenches includes removing an edge of the gate oxide layer to make the thickness of the gate oxide layer uniform. An insulating material is filled in the trenches to form multiple shallow trench isolation structures, where an upper surface of the shallow trench isolation structures close to the edge of the gate oxide layer is coplanar with an upper surface of the gate oxide layer.