Patent classifications
H10W40/254
Semiconductor device including diamond substrate and semiconductor device manufacturing method
It is an object of the present invention to provide a semiconductor device having high heat dissipation performance. A semiconductor device includes: a diamond substrate having a recess in an upper surface thereof; a nitride semiconductor layer disposed within the recess in the upper surface of the diamond substrate; and an electrode disposed on the nitride semiconductor layer, wherein the nitride semiconductor layer and the electrode constitute a field-effect transistor, the diamond substrate has a source via hole extending through a thickness of the diamond substrate to expose the source electrode, and the semiconductor device further includes a via metal covering an inner wall of the source via hole and a lower surface of the diamond substrate.
Thermal management system for electronic device
A heat exchanger for a chip package is provided. The heat exchanger includes a body having an upper side, a lower side, and an internal cavity disposed in the body between the upper side and the lower side. A first outlet port and a second outlet port are formed in the body and are in fluid communication with the internal cavity. An inlet port is formed through the upper side of the body between the first and second outlet ports to supply fluid into the internal cavity.
STRUCTURE AND FORMATION METHOD OF INTEGRATED CHIPS PACKAGE WITH THERMAL CONDUCTIVE ELEMENT
A package structure and a formation method are provided. The method includes forming multiple patterned material elements over a carrier substrate, and the patterned material elements are more thermal conductive than copper. The method also includes forming a protective layer laterally surrounding each of the patterned material elements. The method further includes bonding a chip-containing structure to a first patterned material element of the patterned material elements through dielectric-to-dielectric bonding and metal-to-metal bonding.
SEMICONDUCTOR DEVICE WITH HEAT DISSIPATION LAYER AND METHOD OF FABRICATING THEREOF
One aspect of the present disclosure pertains to an integrated circuit (IC) structure and method of fabricating thereof. The IC structure includes a transistor device formed on a substrate where the transistor device having source/drain (S/D) regions and a gate structure. A multi-layer interconnect (MLI) structure including metal lines and metal vias embedded in an intermetal dielectric (IMD) layer is formed over the substrate. And a thermal dissipation layer is formed having a surface with a plurality of peaks and valleys disposed over at least a portion of the MLI structure. A bonding layer is disposed over the thermal dissipation layer and covering the plurality of peaks and valleys.
COMPOSITE COMPRISING GALLIUM NITRIDE AND DIAMOND AND PRODUCTION METHOD FOR SAME
A composite that includes a gallium nitride layer; an intermediate layer that is formed on a surface of the gallium nitride layer and contains carbon, gallium, and oxygen; and a diamond layer that is joined to the surface of the gallium nitride layer through the intermediate layer.
DIAMOND COATING FOR SEMICONDUCTOR
A method for thermal management of semiconductor devices provides a semiconductor material. A beryllium oxide (BeO) layer is epitaxially grown over the semiconductor material. A polycrystalline diamond coating is deposited over the BeO layer.
SEMICONDUCTOR PACKAGE
According to some example embodiments, a semiconductor package includes a first redistribution layer (RDL) including a first redistribution wiring structure, a substrate on the first RDL and including a wiring structure and having a rectangular ring shape, a semiconductor chip on the first RDL and in a space defined by the substrate, a heat dissipation block between the semiconductor chip and the substrate on the first RDL, a molding member on the first RDL and covering sidewalls of the semiconductor chip and the heat dissipation block and an inner sidewall of the substrate, and a second RDL on the semiconductor chip, the heat dissipation block, the substrate and the molding member and including a second redistribution wiring structure. A planar area of the heat dissipation block is greater than a planar of the semiconductor chip.
Substrate for improved heat dissipation and method
A semiconductor package comprises a package substrate comprised of at least a first layer of dielectric material including a portion of diamond dust material. The diamond dust material is comprised of diamond dust particles. The semiconductor package includes at least one electrical connection coupled through layers of the package substrate.
HIGH ELECTRON MOBILITY TRANSISTOR DEVICE WITH HEAT SPREADER
A heat spreader is described that may include a substrate of a top device, and that cools the top die of a flip-chipped die combination. The heat spreader includes a material with a high thermal conductivity, such as a material including diamond. The top heat spreader substrate may have a connection to the bottom base substrate, e.g., carrier.
TRANSISTOR, TRANSISTOR PREPARATION METHOD, AND ELECTRONIC DEVICE
A transistor includes a substrate having a first surface and a second surface that are opposite to each other. An active layer is disposed on a side of the first surface, and a metal layer is disposed on a side of the second surface. A hole penetrates the substrate and at least a part of the active layer, where in a direction from the substrate to the active layer, the hole includes a first hole segment and a second hole segment, a joint between the first hole segment and the second hole segment has a connection interface, and a hole diameter of the first hole segment is greater than a hole diameter of the second hole segment. A conducting layer is formed on a wall surface of each of the first hole segment and the second hole segment, and the conducting layer is electrically connected to the metal layer.