Patent classifications
H10P14/683
Method for spin-coating a layer on a semiconductor wafer
A method and corresponding spin coater is provided for forming a layer of uniform thickness on a semiconductor wafer having a central region and an outer edge. The method includes: depositing a flowable coating material on the semiconductor wafer at the central region, the layer being formed from the coating material; rotating the semiconductor wafer about an axis such that a centrifugal force urges the coating material to spread from the central region toward the outer edge of the semiconductor wafer; and creating a pressure differential in one or more regions proximate to the outer edge of the semiconductor wafer. The pressure differential may be created by a wall with pins holes, the wall at least partially encircling the outer edge of the semiconductor wafer.
Coatings
The present invention provides an electronic or electrical device or component thereof comprising a cross-linked polymeric coating on a surface of the electronic or electrical device or component thereof; wherein the cross-linked polymeric coating is obtainable by exposing the electronic or electrical device or component thereof to a plasma comprising a monomer compound and a crosslinking reagent for a period of time sufficient to allow formation of the cross-linked polymeric coating on a surface thereof, wherein the monomer compound has the following formula: ##STR00001##
where R.sub.1, R.sub.2 and R.sub.4 are each independently selected from hydrogen, optionally substituted branched or straight chain C.sub.1-C.sub.6 alkyl or halo alkyl or aryl optionally substituted by halo, and R.sub.3 is selected from: ##STR00002##
where each X is independently selected from hydrogen, a halogen, optionally substituted branched or straight chain C.sub.1-C.sub.6 alkyl, halo alkyl or aryl optionally substituted by halo; and n.sub.1 is an integer from 1 to 27; and wherein the crosslinking reagent comprises two or more unsaturated bonds attached by means of one or more linker moieties and has a boiling point at standard pressure of less than 500 C.
Apparatus for substrate processing
A method of processing a substrate is provided. The substrate includes an etching target region and a patterned region. The patterned region is provided on the etching target region. In the method, an organic film is formed on a surface of the substrate. Subsequently, the etching target region is etched by plasma generated from a processing gas. The organic film is formed in a state that the substrate is placed in a processing space within a chamber. When the organic film is formed, a first gas containing a first organic compound is supplied toward the substrate, and then, a second gas containing a second organic compound is supplied toward the substrate. An organic compound constituting the organic film is generated by polymerization of the first organic compound and the second organic compound.
WAFER PROCESSING METHOD
A wafer processing method is disclosed. A second wafer is bonded to a first wafer. The rear surface of the second wafer is subjected to a first grinding process, thereby thinning the second wafer to a first thickness. A sacrificial layer is formed on the rear surface of the second wafer. A one-step wafer edge trimming process is then performed to remove an outer edge region of the sacrificial layer and the second wafer in one-step cut using a blade. The sacrificial layer is removed from the rear surface of the second wafer.
SELECTIVE PASSIVATION AND SELECTIVE DEPOSITION
Methods for selective deposition are provided. Material is selectively deposited on a first surface of a substrate relative to a second surface of a different material composition. An inhibitor, such as a polyimide layer, is selectively formed from vapor phase reactants on the first surface relative to the second surface. A layer of interest is selectively deposited from vapor phase reactants on the second surface relative to the first surface. The first surface can be metallic while the second surface is dielectric. Accordingly, material, such as a dielectric transition metal oxides and nitrides, can be selectively deposited on metallic surfaces relative dielectric surfaces using techniques described herein.
COMPOSITION FOR TREATING SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING MODIFIED SUBSTRATE
The present invention provides a composition for treating a semiconductor device, which can preferentially form a coating film on a first surface in a case of being brought into contact with a substrate having a first surface containing a metal atom and a second surface not containing a metal atom, and can selectively form a coating film on the first surface even after storage; and a method for manufacturing a modified substrate using the composition for treating a semiconductor device. The composition for treating a semiconductor device of the present invention contains a polymer having a functional group which interacts with a surface containing a metal atom in a substrate and an ethylenically unsaturated group, a polymerization inhibitor, and a solvent.
Additives to enhance the properties of dielectric films
A method for improving the elastic modulus of dense organosilica dielectric films (k2.7) without negatively impacting the film's electrical properties and with minimal to no reduction in the carbon content of the film. The method comprising the steps of: providing a substrate within a reaction chamber; introducing into the reaction chamber a gaseous composition comprising a mixture of an alkyl-alkoxysilacyclic compound and 5% or less of certain bis(alkoxy)silanes or mono-alkoxysilanes; and applying energy to the gaseous composition comprising the mixture of the alkyl-alkoxysilacyclic compound and 5% or less of certain bis(alkoxy)silanes or mono-alkoxysilanes to deposit an organosilicon film on the substrate, wherein the organosilicon film has a dielectric constant from 2.70 to 3.30, an elastic modulus of from 6 to 30 GPa, and an at. % carbon from 10 to 45 as measured by XPS.
Silicon fragment defect reduction in grinding process
A method is provided for fabricating a semiconductor wafer having a device side, a back side opposite the device side and an outer periphery edge. Suitably, the method includes: forming a top conducting layer on the device side of the semiconductor wafer; forming a passivation layer over the top conducting layer, the passivation layer being formed so as not to extend to the outer periphery edge of the semiconductor wafer; and forming a protective layer over the passivation layer, the protective layer being spin coated over the passivation layer so as to have a smooth top surface at least in a region proximate to the outer periphery edge of the semiconductor wafer.
Selective deposition and cross-linking of polymeric dielectric material
An exemplary semiconductor structure includes a semiconductor substrate; a plurality of metal lines on top of the semiconductor substrate, each line having a line width 5 nanometers or less: a plurality of dielectric features adjacent to the metal lines; and a plurality of metal vias on top of the metal lines. Out of a random sample of 1000 vias at least 950 vias are fully-aligned to corresponding metal lines.
Semiconductor device manufacturing method and semiconductor device manufacturing system
A semiconductor device manufacturing method includes: forming an organic film composed of a polymer having a urea bond in a recess by supplying amine and isocyanate to a surface of a substrate having the recess; performing a predetermined process on the substrate on which the organic film is formed in the recess; and removing the organic film in the recess by heating the substrate that has been subjected to the predetermined process to depolymerize the organic film. The amine and the isocyanate have a terminal bifunctional linear chain structure having two functional groups at both ends of a linear chain. At least one of the amine or the isocyanate has side chains connected to the linear chain contained in the linear chain structure.