Methods and devices used to cancel non-linear capacitances in high power radio frequency (RF) switches manufactured in bulk complementary metal-oxide-semiconductor (CMOS) processes are disclosed. The methods and devices are also applicable to stacked switches and RF switches fabricated in silicon-on-insulator (SOI) technology.

A semiconductor device includes: an MMIC having a DC pad; a bias substrate; a plurality of MIM capacitors mounted on the bias substrate; a plurality of pads provided on the bias substrate and respectively connected to overlying electrodes of the MIM capacitors; and a wire connecting the DC pad to any one of the plurality of pads, wherein the plurality of pads are arranged between the DC pad and the plurality of MIM capacitors in a planar view, and extend parallel to a row of the plurality of MIM capacitors laterally arranged side by side.

A radio frequency (RF) chip package includes: an RF die; a first peripheral circuit chip; a second peripheral circuit chip; a substrate having a -shaped step formed on a portion thereof so that the RF die is mounted on top of the step of the substrate and the first peripheral circuit chip and the second peripheral circuit chip are mounted on top of the substrate where no step is formed; a first mutual inductance controller for controlling the dimension of the mutual inductance between the first peripheral circuit chip and the RF die; and a second mutual inductance controller for controlling the dimension of the mutual inductance between the second peripheral circuit chip and the RF die.

Disclosed is a tunable inductor device having a substrate, a planar spiral conductor having a plurality of spaced-apart turns disposed over the substrate, and a phase change switch (PCS) having a patch of a phase change material (PCM) disposed over the substrate between and in contact with a pair of adjacent segments of the plurality of spaced-apart turns, wherein the patch of the PCM is electrically insulating in an amorphous state and electrically conductive in a crystalline state. The PCS further includes a thermal element disposed adjacent to the patch of PCM, wherein the thermal element is configured to maintain the patch of the PCM to within a first temperature range until the patch of the PCM converts to the amorphous state and maintain the patch of the PCM within a second temperature range until the first patch of PCM converts to the crystalline state.

A package substrate is disclosed. The package substrate includes a die package in the package substrate located at least partially underneath a location of a power delivery interface in a die that is coupled to the surface of the package substrate. Connection terminals are accessible on a surface of the die package to provide connection to the die that is coupled to the surface of the package substrate. Metal-insulator-metal layers inside the die package are coupled to the connection terminals.

A high-density integrated device package may include two or more primary device dies arranged along a first plane, an inductor comprising an inductor core and an inductor coil, the inductor being fixedly connected to at least one of the primary device dies, and a dielectric substrate arranged along a second plane which is substantially perpendicular to the first plane. The integrated device package further includes a secondary device die (e.g., a power IC) electrically connected to the dielectric substrate such that an orientation of the secondary device die is substantially perpendicular to that of the two or more primary device dies, wherein the dielectric substrate is fixedly connected to the inductor core, and wherein the dielectric substrate is electrically connected to at least one of the primary device dies by an edge connector.

A low-voltage varistor includes a cured body of a resin composition for forming the low-voltage varistor. The resin composition includes: (A) at least one selected from carbon nanotubes and carbon aerogels; and (B) at least one selected from epoxy resin and acrylic resin.

A possible benefit of the present disclosure is to further improve a heat dissipation property of an electronic component. A high-frequency module includes a mounting substrate, a filter (for example, a transmission filter), a resin layer, a shielding layer, and a metal member. The resin layer covers at least a portion of an outer peripheral surface (for example, an outer peripheral surface) of the filter. The shielding layer covers at least a portion of the resin layer. The metal member is disposed at a first principal surface of the mounting substrate. The metal member is connected to a surface of the filter on the opposite side from the mounting substrate, the shielding layer, and the first principal surface of the mounting substrate.

A Doherty amplifier includes a carrier amplifier and a peak amplifier. Each of the carrier amplifier and the peak amplifier is a differential amplifier including a first phase amplifier and a second phase amplifier. The Doherty amplifier also includes a balun configured to synthesize an output signal of the carrier amplifier and an output signal of the peak amplifier. The carrier amplifier and the peak amplifier are formed in an integrated circuit. The balun is formed on a printed wiring board on which the integrated circuit is mounted.

A semiconductor device has a first substrate. A first semiconductor die and second semiconductor die are disposed over the substrate. An interconnect bridge is disposed over the first semiconductor die and second semiconductor die. The interconnect bridge has a second substrate. A conductive trace is formed over the second substrate. The conductive trace is electrically coupled from the first semiconductor die to the second semiconductor die. An IPD is also formed over the second substrate. The IPD is electrically coupled between the first semiconductor die and second semiconductor die. An encapsulant is deposited over the first substrate, first semiconductor die, second semiconductor die, and interconnect bridge.