Patent classifications
H10P14/662
Method and system for mixed group V precursor process
A method of forming a layer includes introducing a Group III precursor in a reactor, introducing a hydride Group V precursor in the reactor, and introducing a metal-organic Group V precursor in the reactor to form the layer. The method can further include mixing the hydride Group V precursor and the metal-organic Group V precursor. Advantageously, the layer and method of forming the layer utilize mixed Group V precursors, improve uniformity, decrease thermal sensitivity of the end material, normalize concentration profiles of precursors, improve yield, increase manufacturing efficiency, improve control of III-V ratios (e.g., pressure, growth rate, flux), and reduce manufacturing costs.
Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures
A method for depositing an oxide film on a substrate by a cyclical deposition is disclosed. The method may include: depositing a metal oxide film over the substrate utilizing at least one deposition cycle of a first sub-cycle of the cyclical deposition process; and depositing a silicon oxide film directly on the metal oxide film utilizing at least one deposition cycle of a second sub-cycle of the cyclical deposition process. Semiconductor device structures including an oxide film deposited by the methods of the disclosure are also disclosed.
GALLIUM NITRIDE DEVICE HAVING A COMBINATION OF SURFACE PASSIVATION LAYERS
A method of fabricating a semiconductor device includes providing a GaN substrate with an epitaxial layer formed thereover, the epitaxial layer forming a heterojunction with the GaN substrate, the heterojunction supporting a 2-dimensional electron gas (2DEG) channel in the GaN substrate. A composite surface passivation layer is formed over a top surface of the epitaxial layer, wherein the composite surface passivation layer comprises a first passivation layer portion formed proximate to a first region of the GaN device and a second passivation layer portion formed proximate to a second region of the GaN device. The first and second passivation layer portions are disposed laterally adjacent to each other over the epitaxial layer, wherein the first passivation layer portion is formed in a first process and the second passivation layer portion is formed in a second process.
DIAMOND COATING FOR SEMICONDUCTOR
A method for thermal management of semiconductor devices provides a semiconductor material. A beryllium oxide (BeO) layer is epitaxially grown over the semiconductor material. A polycrystalline diamond coating is deposited over the BeO layer.
Composite substrate and preparation method thereof, and semiconductor device structure
A composite substrate includes a substrate, a high-resistance layer located on the substrate, the high-resistance layer comprising a first low-temperature aluminum nitride (AlN) layer, a high-temperature AlN layer and a second low-temperature AlN layer which are stacked in sequence, and a growth substrate located on a side, away from the substrate, of the high-resistance layer. Under the action of the first low-temperature AlN layer, a tensile stress on the high-temperature AlN layer may be reduced, to reduce a dislocation, and further improve a crystal quality of the high-temperature AlN layer and ensure resistivity of the high-temperature AlN layer; and an element of Al in the high-temperature AlN layer is prevented from diffusing into the growth substrate, to protect the crystal quality of the high-temperature AlN layer and improve a bonding effect between the high-resistance layer and the growth substrate. Thus, stability and reliability of the composite substrate are greatly improved.
APPARATUSES INCLUDING DISCRETE CHARGE STORAGE STRUCTURES WITHIN A STACK STRUCTURE, AND RELATED MEMORY DEVICES
Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control gates, a charge block material between each of the charge storage structures and the laterally adjacent control gates, and a pillar extending through the stack of alternating oxide materials and control gates. Each of the dielectric materials in the stack has at least two portions of different densities and/or different rates of removal. Also disclosed are methods of fabricating such semiconductor structures.
PLASMA ENHANCED ATOMIC LAYER DEPOSITION OF SILICON-CONTAINING FILMS
Methods of depositing silicon-containing films by plasma-enhanced atomic layer deposition (PEALD) are described and can include one or more techniques to provide a chemical vapor deposition (CVD)-type component.
Silicon fragment defect reduction in grinding process
A method is provided for fabricating a semiconductor wafer having a device side, a back side opposite the device side and an outer periphery edge. Suitably, the method includes: forming a top conducting layer on the device side of the semiconductor wafer; forming a passivation layer over the top conducting layer, the passivation layer being formed so as not to extend to the outer periphery edge of the semiconductor wafer; and forming a protective layer over the passivation layer, the protective layer being spin coated over the passivation layer so as to have a smooth top surface at least in a region proximate to the outer periphery edge of the semiconductor wafer.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
An upper surface of a plug (PL1) is formed so as to be higher than an upper surface of an interlayer insulating film (PIL) by forming the interlayer insulating film (PIL) on a semiconductor substrate (1S), completing a CMP method for forming the plug (PL1) inside the interlayer insulating film (PIL), and then, making the upper surface of the interlayer insulating film (PIL) to recede. In this manner, reliability of connection between the plug (PL1) and a wiring (W1) in a vertical direction can be ensured. Also, the wiring (W1) can be formed so as not to be embedded inside the interlayer insulating film (PIL), or a formed amount by the embedding can be reduced.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
To reduce defects in an oxide semiconductor film in a semiconductor device. To improve the electrical characteristics and the reliability of a semiconductor device including an oxide semiconductor film. In a semiconductor device including a transistor including agate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.