A warpage amount estimation apparatus that estimates a warpage amount of a substrate includes a processor and a memory. The processor acquires a captured image of one surface of an estimation target substrate. The processor calculates a rate of change in pixel value relating to a substrate radial direction in the captured image of the one surface of the estimation target substrate. The processor estimates a warpage amount of the estimation target substrate based on a correlation obtained in advance between a rate of change in pixel value relating to the substrate radial direction in a captured image of the one surface of a substrate and a warpage amount of the substrate, and on a calculation result of the rate of change which is calculated.

Approaches herein provide devices and methods for forming optimized gate-all-around transistors. One method may include forming a plurality of nanosheets each comprising a plurality of alternating first layers and second layers, and etching the plurality of nanosheets to laterally recess the second layers relative to the first layers. The method may further include forming an inner spacer over the recessed second layers by forming a spacer material along an exposed portion of each of the plurality of nanosheets, etching the spacer material to remove the spacer material from the first layers of each of the plurality of nanosheets, and performing a sidewall treatment to the plurality of nanosheets after the spacer material is removed from the first layers of each of the plurality of nanosheets.

A substrate inspection apparatus includes a light source unit, a pulsed beam matching unit, a substrate support unit, an incidence angle adjusting unit, and a detecting unit. The light source unit emits first and second laser beams. The pulsed beam matching unit matches the first and second laser beams to superimpose a pulse of the first laser beam on a pulse of the second laser beam in time and space. The incidence angle adjusting unit adjusts angles of incidence of the matched first laser beam and second laser beams to irradiate the first laser beam and the second laser beam on the substrate, and mixes the first and second laser beams to generate an evanescent wave on the substrate. The evanescent wave generates scattered light due to a defect of the substrate. The detecting unit detects the scattered light generated due to the defect of the substrate.

A semiconductor device and a method for fabricating the same are disclosed. The semiconductor device includes a first wafer structure and at least one die stack layer stacked on a second side of the first wafer structure. The die stack has first test pad and second test pad, which can be used to test and screen the die in the die stack and the die stack, contributing to increased yield of the semiconductor device. Additionally, metal pad may be formed on a first side of the first wafer structure before the die stack is stacked on the first wafer structure, avoiding warpage or other distortion possibly otherwise caused by high-temperature treatment if they are formed after the die stack is stacked. This facilitates stacking of more dies and/or wafers together. The semiconductor device is obtainable according to the method.

A substrate treatment method includes determining a first model of an upper substrate and a lower substrate based on alignment error data taken by measuring positions of a plurality of alignment marks of each of the upper substrate and the lower substrate, determining a second model of the upper substrate and the lower substrate based on first sampling alignment error data regarding at least one alignment mark from the alignment error data, determining a third model of the upper substrate and the lower substrate based on second sampling alignment error data taken by measuring positions of the at least one alignment mark, determining a fourth model by correcting the third model based on a difference between the second model and the first model, and aligning a position of a substrate selected between the upper substrate and the lower substrate according to the fourth model.

According to certain aspects, one or more processors can be configured to: determine a limit for detecting a lot associated with a specified product as an anomaly based on one or more machine learning models, the limit for detecting a lot associated with the specified product as an anomaly enabling a semiconductor manufacturing system to identify one or more defective lots at an earlier point in time than using another limit associated with the specified product determined based on a statistical method, and to identify one or more defective lots that do not satisfy the other limit based on the statistical method; in response to a failure rate of a first lot in connection with the parameter satisfying the limit, identify the first lot as an anomaly and automatically hold the first lot in order to address defects associated with the first lot in real time.

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for optimizing a process of polishing semiconductor wafers. In one aspect, the method comprises repeatedly performing the following: i) selecting a configuration of input settings for polishing a semiconductor wafer, based on a causal model that measures current causal relationships between input settings and a quality of semiconductor wafers; ii) receiving a measure of the quality of the semiconductor wafer polished with the configuration of input settings; and iii) adjusting, based on the measure of the quality of the semiconductor wafer polished with the configuration of input settings, the causal model.

A method for modeling a wafer profile by a function is provided in which the function is used for calculating a displacement z in a thickness direction of a wafer and is a sum of plural functions. The first function g(r) has a distance r from the center of the wafer as a variable. The second function Arh(N) indicates multiplying a sine or cosine function h(N), with a first angle with reference to a predetermined position in a circumferential direction of the wafer as a variable and an integer N as a constant, by a coefficient A with the distance r. The third function Bri(M(-)) indicates multiplying a sine or cosine function i(M(-)), with the first angle as a variable, a second angle with reference to the predetermined position as a constant, and an integer M as a constant, by a coefficient B and the distance r.

The present disclosure relates to a system and a non-transitory computer-readable medium for estimating the height of foreign matter, etc. adhering to a sample. In order to achieve the abovementioned purpose, proposed is a system, etc. in which data acquired by a charged particle beam device or features extracted from the data are input to a learning model, which is provided with, in an intermediate layer thereof, a parameter learned using teacher data having data acquired by the charged particle beam device or features extracted from the data as inputs and having the heights or depths of the structures of samples or of foreign matter on the samples as outputs, and height or depth information is output.

A defect observation method includes, as steps executed by a computer system, a first step of acquiring, as a bevel image, an image captured using defect candidate coordinates in a bevel portion as an imaging position by using a microscope or an imaging apparatus; and a second step of detecting a defect in the bevel image. The second step includes a step of determining whether there is at least one portion among a wafer edge, a wafer notch, and an orientation flat in the bevel image, a step of switching and selectively applying a defect detection scheme of detecting the defect from the bevel image from a plurality of schemes which are candidates based on a determination result, and a step of executing a process of detecting the defect from the bevel image in conformity with the switched scheme.