H10P90/1906

SEMICONDUCTOR DEVICE WITH ISOLATION STRUCTURE AND METHOD OF MANUFACTURING THE SAME

A semiconductor device is provided. The semiconductor device includes a first semiconductive region, a second semiconductive region, an isolation structure and at least one inner insulating via. The isolation structure is formed between the first semiconductive region and the second semiconductive region and includes an isolation bottom formed beneath the second semiconductive region and an isolation ring. The isolation ring includes a plurality of insulating regions and a plurality of doped regions formed alternately. The isolation bottom and the plurality of insulating regions have insulating materials. The plurality of doped regions have dopants of a conductivity type complementary to those of the first and second semiconductive regions. The isolation ring has a lower portion connecting the isolation bottom and an upper portion surrounding the second semiconductive region. The inner insulating via is formed in the second semiconductive region, on the isolation bottom and surrounded by the isolation ring.

SEMICONDUCTOR STRUCTURES AND METHODS OF MANUFACTURING THE SAME

A semiconductor structure includes a substrate, an isolation layer over the substrate, an epitaxial layer over the substrate and covering the isolation layer, and a deep trench isolation that extends into the epitaxial layer. The deep trench isolation connects the isolation layer. The isolation layer is disposed in the second region of the semiconductor structure, but does not extend into the first region of the semiconductor structure. The semiconductor structure further includes a first element formed in the first region and a second element formed in the second region. In addition, the substrate acts as the drain region of the first element. The second element is disposed in an isolation region that is defined by the deep trench isolation and the isolation layer.

SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF

A semiconductor structure includes an SOI substrate having a base substrate, a buried oxide layer on the base substrate, and a device layer on the buried oxide layer, a circuit element disposed on the device layer and surrounded by a trench isolation region in the SOI substrate; an etch stop layer disposed around the circuit element; a first dielectric layer disposed on the etch stop layer; and a buried power rail embedded in the first dielectric layer, the etch stop layer, the trench isolation region, and the buried oxide layer. The buried power rail is isolated from the device layer through the buried oxide layer and trench-filling oxide in the trench isolation region.

SEMICONDUCTOR STRUCTURES AND METHODS OF MANUFACTURING THE SAME

A semiconductor structure includes a substrate, an epitaxial layer over the substrate, an isolation layer that is formed in the substrate or in the epitaxial layer, and a deep trench isolation that extends into the epitaxial layer and connects the isolation layer. The isolation layer is disposed in the second region of the semiconductor structure but does not extend into the first region of the semiconductor structure. The semiconductor structure further includes a first element formed in the first region and a second element formed in the second region. In addition, the substrate acts as the drain region of the first element. The second element is disposed in an isolation region that is defined by the deep trench isolation and the isolation layer.

METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING AN ENRICHED SILICON 28 EPITAXIAL LAYER

A method for making a semiconductor device may include growing .sup.28Si on a semiconductor layer, intermixing the .sup.28Si in the semiconductor layer, and thinning the semiconductor layer after intermixing. The method may further include repeating growing, intermixing, and thinning until a concentration of .sup.28Si in the semiconductor layer reaches a target concentration.

Trench isolation connectors for stacked structures

Trench isolation connectors are disclosed herein for stacked semiconductor structures, and particularly, for stacked semiconductor structures having high voltage devices. An exemplary stacked device arrangement includes a first device substrate having a first device and a second device substrate having a second device. An isolation structure disposed in the second device substrate surrounds the second device. The isolation structure extends through the second device substrate from a first surface of the second device substrate to a second surface of the second device substrate. A conductive connector is disposed in the isolation structure. The conductive connector is connected to the second device and the first device. The conductive connector extends from the first surface of the second device substrate to the second surface of the second device substrate. The first device and the second device may be a first high voltage device and a second high voltage device, respectively.

ISOLATED ACTIVE DEVICES AND METHODS FOR FORMING AND USING

Methods for forming a silicon-on-insulator (SOI) substrate are disclosed. A substrate includes a sacrificial layer and a first substrate layer over the sacrificial layer. Vias are formed around a first substrate region of the first substrate layer down to the sacrificial layer. The sacrificial layer is etched away, forming a buried volume. Substrate supports connecting the first substrate region to the first substrate layer are converted into a dielectric material. The buried volume and the vias are filled with a first dielectric material, forming a buried dielectric layer and a first dielectric sidewall around the first substrate region. A second substrate layer is formed over the first substrate layer. A trench is formed around a second substrate region of the second substrate layer. The trench is filled with a second dielectric material to form a second dielectric sidewall around the second substrate region connected to the first dielectric sidewall.

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
20260129970 · 2026-05-07 ·

A semiconductor structure includes a substrate having a first doping type, a first conductive structure disposed within the substrate and having a bottom portion and a sidewall portion disposed over and coupled to the bottom portion, a first isolation layer disposed under the first conductive structure and within the substrate, and a semiconductor device disposed over the first conductive structure and including an oxide layer disposed over a first surface of the substrate. The first conductive structure is partially enclosed by the oxide layer and the first isolation layer, at least a portion of the semiconductor device is surrounded by the sidewall portion of the first conductive structure, and the semiconductor device is separated from the first conductive structure.

DIELECTRIC ISOLATION STRUCTURES AND METHODS OF MAKING SAME

In a method for forming a dielectric isolation structure or container, ion implantation is performed to form a buried implant region in a base semiconductor material. Trenches are formed in the base semiconductor material that access the buried implant region. The buried implant region is removed by etching via the trenches to form a lateral undercut region connected with the trenches. The lateral undercut region and the trenches are filled with dielectric material to form a dielectric bottom region and annular dielectric sidewall of the dielectric isolation structure. By forming of the trenches and the filling of the trenches in two or more iterations, with the removal of the buried implant region being performed after one of these iterations, detachment and self-collapse of the contained portion of base semiconductor material is avoided.