According to one or more embodiments, a method includes positioning a substrate within a processing chamber. The substrate includes a hardmask layer disposed over a surface of the substrate, a first layer disposed over the hardmask layer, and a second layer disposed over the first layer. The method further includes flowing a process gas into the processing chamber, and delivering a microwave energy for a period of time to the process gas to selectively etch the hardmask layer and the first layer, wherein delivering the microwave energy to the process gas does not generate a plasma.

A method of filling a gap on a surface of a substrate is provided. The method may comprise (a) placing a substrate on a susceptor within a reaction chamber, the substrate comprising a gap; (b) a deposition step comprising: flowing a carbon precursor into the reaction chamber; and exposing the carbon precursor to a plasma, wherein the carbon precursor reacts to form a first deposited material; and (c) a treatment step comprising: annealing the substrate in an atomic oxygen-containing gas to cause the first deposited material to flow within the gap for forming a carbon film.

There is provided a technique that includes: (a) forming a first film, containing at least a portion of a partial structure X and a partial structure Z derived from a partial structure Y, on a substrate by supplying, to the substrate, a precursor containing both the partial structure X and the partial structure Y, or a first precursor containing the partial structure X and a second precursor containing the partial structure Y; and (b) modifying the first film formed on the substrate into a second film by exposing the first film to a modifying agent, the second film containing at least a portion of the partial structure X and a smaller amount of the partial structure Z than that contained in the first film.

The present disclosure is directed to formation of a low-k spacer. For example, the present disclosure includes an exemplary method of forming the low-k spacer. The method includes depositing the low-k spacer and subsequently treating the low-k spacer with a plasma and/or a thermal anneal. The low-k spacer can be deposited on a structure protruding from the substrate. The plasma and/or thermal anneal treatment on the low-k spacer can reduce the etch rates of the spacer so that the spacer is etched less in subsequent etching or cleaning processes.

A SiC semiconductor device manufacturing method includes a step of etching a surface of a SiC substrate 1 with H.sub.2 gas under Si-excess atmosphere within a temperature range of 1000 C. to 1350 C., a step of depositing, by a CVD method, a SiO.sub.2 film 2 on the SiC substrate 1 at such a temperature that the SiC substrate 1 is not oxidized, and a step of thermally treating the SiC substrate 1, on which the SiO.sub.2 film 2 is deposited, in NO gas atmosphere within a temperature range of 1150 C. to 1350 C.

A semiconductor device with a small variation in transistor characteristics is provided. The semiconductor device includes an oxide semiconductor film, a source electrode and a drain electrode over the oxide semiconductor film, an interlayer insulating film placed to cover the oxide semiconductor film, the source electrode, and the drain electrode, a first gate insulating film over the oxide semiconductor film, a second gate insulating film over the first gate insulating film, and a gate electrode over the second gate insulating film. The interlayer insulating film has an opening overlapping with a region between the source electrode and the drain electrode, the first gate insulating film, the second gate insulating film, and the gate electrode are placed in the opening of the interlayer insulating film, the first gate insulating film includes oxygen and aluminum, and the first gate insulating film includes a region thinner that is than the second gate insulating film.

Embodiments disclosed herein include semiconductor devices and methods of forming such semiconductor devices. In an embodiment, the semiconductor device comprises a substrate, and a first transistor over the substrate. In an embodiment, the first transistor comprises a first semiconductor channel above the substrate, a first gate dielectric surrounding the first semiconductor channel, and a first gate electrode over the first gate dielectric. In an embodiment, the semiconductor device further comprises a second transistor over the substrate. In an embodiment, the second transistor comprises a second semiconductor channel above the substrate, a second gate dielectric surrounding the second semiconductor channel, where the second gate dielectric is different than the first gate dielectric, and a second gate electrode over the second gate dielectric, where the first gate electrode and the second gate electrode comprise the same material.

A process of forming an oxide layer, the oxide layer, a semiconductor device, and a method for manufacturing a semiconductor device. The process of forming the oxide layer including conducting atomic layer deposition at a temperature of less than about 400 C., wherein the atomic layer deposition includes: supplying a metal or semi-metal precursor and a first reaction catalyst to a substrate positioned in a chamber for atomic layer deposition to adsorb the metal or the semi-metal precursor on a surface of the substrate; and supplying a reactant and a second reaction catalyst to the substrate on which the metal or semi-metal precursor is adsorbed to form the oxide layer, wherein the first reaction catalyst and the second reaction catalyst comprise primary or secondary amine, respectively.

The present disclosure relates to a method for manufacturing a semiconductor device. The method for manufacturing a semiconductor device, according to one embodiment, may comprise a gap-fill step of burying a gap-fill oxide in trenches formed on a substrate, so as to form a gap-fill oxide film. In one embodiment, the gap-fill step can comprise a high pressure oxidation (HPO) step. According to embodiments, a semiconductor device with electrical properties superior to those of a conventional semiconductor device can be manufactured.

Exemplary processing methods may include providing one or more deposition precursors to a processing region of a semiconductor processing chamber. A substrate including a plurality of layers of a silicon-containing material may be housed within the processing region. Adjacent layers of the silicon-containing material may be vertically spaced apart to define a plurality of lateral gaps. One or more features may extend through the plurality of layers of the silicon-containing material and into the substrate. The methods may include depositing a flowable oxygen-containing material on the substrate in the plurality of lateral gaps and in the one or more features extending into the substrate. The methods may include providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber. The methods may include contacting the substrate with the hydrogen-containing precursor while applying a bias power. The contacting may reduce a thickness of the flowable oxygen-containing material.