A power device includes high electron mobility transistors formed on an active layer, each transistor comprising a source finger, a drain finger and a gate finger, a source contact common to the source fingers, a drain contact common to the drain fingers, and a gate contact common to the gate fingers. At least one gate finger is not connected to the gate contact and forms a Schottky contact with the active layer. This gate finger forms, with the neighbouring drain finger, a Schottky diode configured to measure an operating temperature within the power device.

A semiconductor device includes: an active region having a semiconductor element and a surface electrode provided by a wiring electrode material and connected to the semiconductor element on a side adjacent to a surface of a semiconductor chip; and a pad arrangement region having a pad provided by the wiring electrode material. The pad arrangement region overlaps the active region in a direction normal to the surface of the semiconductor chip. In a part where the pad arrangement region and the active region overlap, the pad is disposed on the surface electrode through an isolation insulating film so that the wiring electrode material is in two layers to provide a double-layer wiring electrode structure. In a part of the active region without overlapping the pad arrangement region, the surface electrode has a single-layer wiring electrode structure composed of a single layer of the wiring electrode material.

A semiconductor device comprises a semiconductor layer structure, a gate pad on the semiconductor layer structure, and a metal gate runner on the semiconductor layer structure. The metal gate runner comprises an inner gate runner that comprises a first inner segment and a second inner segment that interconnect at a first oblique angle.

The present disclosure is directed to conductive structures that may be utilized in a radio-frequency (RF) switch. The embodiments of the conductive structures of the present disclosure are formed to balance the on resistance (R.sub.on) and the off capacitance (C.sub.off) such that the R.sub.on.Math.C.sub.off value is optimized such that the conductive structures are relatively efficient as compared to conventional conductive structures within conventional RF switches. For example, the conductive structures include various metallization layers that are stacked on each other and spaced apart in a selected manner to balance the R.sub.on and the C.sub.off as to optimize the R.sub.on.Math.C.sub.off figure of merit as a lower R.sub.on.Math.C.sub.off is preferred.

A semiconductor device includes a substrate having a first surface, a second surface, and an opening; a semiconductor device layer having a third surface and a fourth surface; a heat transfer member; source electrodes disposed on a fourth surface; and electrically conductive vias that penetrate the semiconductor device layer and a diamond layer to electrically connect the source electrodes to a metal layer. The heat transfer member includes the diamond layer and the metal layer, the diamond layer covers a bottom surface and an inner wall surface of the opening, and the metal layer is disposed on the diamond layer.

A method of fabricating a semiconductor device includes forming a protective structure on at least one die on a substrate. The protective structure exposes one or more electrical contacts on a first surface of the at least one die. Respective terminals are formed on the one or more electrical contacts exposed by the protective structure. Related packages and fabrication methods are also discussed.

A transistor device includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

The semiconductor device includes a semiconductor layer which has a main surface, a switching device which is formed in the semiconductor layer, a first electrode which is arranged on the main surface and electrically connected to the switching device, a second electrode which is arranged on the main surface at an interval from the first electrode and electrically connected to the switching device, a first terminal electrode which has a portion that overlaps the first electrode in plan view and a portion that overlaps the second electrode and is electrically connected to the first electrode, and a second terminal electrode which has a portion that overlaps the second electrode in plan view and is electrically connected to the second electrode.

A semiconductor device includes an active layer having an active region, a source electrode, a drain electrode, and a gate electrode disposed on the active region of the active layer and extending along a first direction, and multiple first P-GaN islands disposed on the active region and under the drain electrode. A vertical projection of the drain electrode on the active region covers the entirety of a vertical projection of each of the first P-GaN islands on the active region.

A semiconductor device includes a semiconductor substrate in which a first trench is formed, a gate pad on the semiconductor substrate, first gate wiring and second gate wiring electrically connected to the gate pad, finger wiring that is provided between the first gate wiring and the second gate wiring and is electrically connected to the gate pad, a first main electrode between the first gate wiring and the finger wiring, a second main electrode between the second gate wiring and the finger wiring, a first lower-stage electrode in the first trench, and a first upper-stage electrode provided on the first lower-stage electrode in the first trench, wherein the first lower-stage electrode contacts with the first gate wiring or the second gate wiring and the finger wiring, and the first upper-stage electrode contacts with the first gate wiring or the second gate wiring and the finger wiring.