POWER MICROELECTRONIC DEVICE
20260011617 ยท 2026-01-08
Assignee
Inventors
Cpc classification
H10D62/852
ELECTRICITY
H10D84/101
ELECTRICITY
H10W40/00
ELECTRICITY
H10D30/4755
ELECTRICITY
H10W20/484
ELECTRICITY
International classification
H01L23/34
ELECTRICITY
H01L23/482
ELECTRICITY
H10D30/47
ELECTRICITY
H10D84/00
ELECTRICITY
Abstract
A power device includes high electron mobility transistors formed on an active layer, each transistor comprising a source finger, a drain finger and a gate finger, a source contact common to the source fingers, a drain contact common to the drain fingers, and a gate contact common to the gate fingers. At least one gate finger is not connected to the gate contact and forms a Schottky contact with the active layer. This gate finger forms, with the neighbouring drain finger, a Schottky diode configured to measure an operating temperature within the power device.
Claims
1. A power microelectronic device comprising: a plurality of high electron mobility basic transistors formed on an active layer and connected in parallel, each basic transistor comprising a source finger, a drain finger and a gate finger interposed between the source finger and the drain finger, a source contact common to the source fingers, a drain contact common to the drain fingers, and a gate contact common to the gate fingers, wherein at least one gate finger is not connected to the gate contact and forms a Schottky contact with the active layer, and the at least one gate finger forms, with a neighbouring drain finger, at least one Schottky-type diode configured to measure an operating temperature within the power microelectronic device.
2. The device according to claim 1, wherein the at least one gate finger forming the Schottky contact is connected to a neighbouring source finger.
3. The device according to claim 2, wherein the neighbouring source finger is connected to the source contact, such that measuring the operating temperature is done through the source contact.
4. The device according to claim 2, comprising at least one detection contact independent of the source, drain and gate contacts, wherein the neighbouring source finger is connected to the at least one detection contact, such that measuring the operating temperature is done through the at least one detection contact.
5. The device according to claim 1, further comprising a barrier layer inserted between the active layer and the gate fingers, wherein the at least one gate finger forming the Schottky contact passes through at least partially the barrier layer.
6. The device according to claim 1, wherein the at least one gate finger forming the Schottky contact comprises a plurality of gate fingers forming, with respective neighbouring drain fingers, a plurality of Schottky-type diodes each configured to measure an operating temperature within the power microelectronic device.
7. The device according to claim 6, comprising a plurality of independent detection contacts, wherein the gate fingers of the plurality of Schottky diodes are connected to the independent detection contacts, such that the operating temperatures are measured through the detection contacts.
8. The device according to claim 7, wherein one single detection contact of the plurality of independent detection contacts corresponds to one single gate finger of the plurality of Schottky diodes (DS).
9. The device according to claim 6, wherein the basic transistors are arranged in matrix form and the Schottky-type diodes are distributed randomly within the matrix.
10. The device according to claim 6, wherein the basic transistors are arranged in rectangular matrix form, the device comprising at least four Schottky-type diodes disposed at four corners of the rectangular matrix.
Description
BRIEF DESCRIPTION OF THE FIGURES
[0019] The aims, objectives, as well as the features and advantages of the invention will best emerge from the detailed description of embodiments of the latter, which are illustrated by the following accompanying drawings, in which:
[0020]
[0021]
[0022]
[0023]
[0024]
[0025]
[0026] The drawings are given as examples and are not limiting of the invention. They constitute principle schematic representations, intended to facilitate the understanding of the invention and are not necessarily to the scale of practical applications. In particular, on the principle diagrams, the thicknesses of the different layers, and the dimensions of the different elements (fingers, contacts, etc.) are not representative of reality.
DETAILED DESCRIPTION
[0027] Before starting a detailed review of embodiments of the invention, optional features are stated below, which can optionally be used in association or alternatively:
[0028] According to an example, the at least one gate finger forming the Schottky contact is connected to the neighbouring source finger. This makes it possible to only preserve one Schottky diode between said gate finger and the neighbouring drain finger. This makes it possible to avoid forming another diode between said gate finger and the neighbouring source finger.
[0029] According to an example, this neighbouring source finger is connected to the source contact of the power microelectronic device, such that measuring the operating temperature is done through said source contact. The measurement is done typically in the blocking situation of the basic transistors, in the fourth quadrant of the feature of these basic transistors.
[0030] According to another example, the power microelectronic device comprises at least one detection contact, independent of the source, drain and gate contacts, and the neighbouring source finger, i.e. the source finger connected to the at least one gate finger forming the Schottky contact, is connected to said at least one detection contact, such that measuring the operating temperature is done through said at least one detection contact. The measurement is done independently of the operation of the basic transistors.
[0031] According to an example, the device further comprises a barrier layer, for example, AlGaN-based, inserted between the active layer and the gate fingers. According to an example, the at least one gate finger forming the Schottky contact passes through at least partially said barrier layer. According to an alternative example, the at least one gate finger forming the Schottky contact is disposed on said barrier layer. The Schottky contact can be produced by etching the AlGaN-based barrier layer, then etching a few nanometres of the GaN-based active layer, and by deposition of a metal, for example, at least 60 nanometres of TiN or a few hundreds of nanometres of nickel. This makes it possible to contact the 2DEG laterally. The metals are chosen according to their output work in order to adjust the Schottky barrier as needed.
[0032] According to an example, the at least one gate finger forming the Schottky contact comprises a plurality of gate fingers, forming with the respective neighbouring drain fingers, a plurality of Schottky-type diodes configured to each measure an operating temperature within the power microelectronic device. This makes it possible to raise temperatures in different zones of the device. If the anodes of the Schottky diodes are all connected to the source contact, an average temperature measurement is obtained. If the anodes of the Schottky diodes are connected to independent contacts, local temperature measurements are obtained.
[0033] According to an example, the power microelectronic device comprises a plurality of independent detection contacts, and the gate fingers of the plurality of Schottky diodes are connected to said independent detection contacts, such that the operation temperatures are measured through said detection contacts. This makes it possible to take local temperature measurements, for example, on several zones of the device.
[0034] According to an example, one single detection contact of the plurality of independent detection contacts corresponds to one single gate finger of the plurality of Schottky diodes. This makes it possible to take local and specific temperature measurements. A temperature mapping within the device can be advantageously performed.
[0035] According to an example, the basic transistors are arranged in matrix form. According to an example, the Schottky-type diodes are distributed randomly within said matrix. According to another example, the Schottky-type diodes are distributed according to a symmetrical distribution within said matrix. The Schottky diodes can be distributed according to the hot points of the device, for example, to avoid a failure of the device or to monitor a thermal dissipation within the device.
[0036] According to an example, the basic transistors are arranged in rectangular matrix form, and the device comprises at least four Schottky-type diodes, disposed at the four corners of said rectangular matrix. The temperature measured at the corners of the device can be partially due to adjacent devices.
[0037] Unless incompatible, it is understood that all of the optional features above and/or the variants indicated can be combined, so as to form an embodiment which is not necessarily illustrated or described. Such an embodiment is clearly not excluded from the invention.
[0038] In the scope of the present invention, the power device architectures considered are based on a two-dimensional electron gas (2DEG) conduction principle.
[0039] HEMT (high electron mobility transistor)-type transistors, are in particular based on this two-dimensional electron gas architecture. For power and temperature handling reasons (in particular, high-voltage power and temperature handling), the semiconductor material of these transistors is preferably chosen, so as to have a wide bandgap. Among wide bandgap HEMT transistors, gallium nitride-based transistors are generally preferred.
[0040] It is specified that, in the scope of the present invention, the terms on, surmounts, covers, underlying, opposite and their equivalents do not necessarily mean in contact with. Thus, for example, the deposition of a first layer on a second layer, does not compulsorily mean that the two layers are directly in contact with one another, but means that the first layer covers at least partially the second layer by being either directly in contact with it, or by being separated from it by at least one other layer or at least one other element.
[0041] For example, and in a manner known per se, in the field of GaN-based HEMT-type transistors, a thin AlN layer can be inserted between two GaN and AlGaN semiconductor layers.
[0042] A layer can moreover be composed of several sublayers of one same material or of different materials.
[0043] By a substrate, a stack, a layer, with the basis of a material A, this means a substrate, a stack, a layer comprising this material A only, or this material A and optionally other materials, for example, alloy elements and/or doping elements.
[0044] The doping ranges associated with the different doping types possibly indicated in the present application are as follows:
[0045] A preferably orthonormal system, comprising the axes x, y, z is represented in the accompanying figures.
[0046] In the present patent application, the height of an element, typically a gate or drain finger, is taken along z. The thickness of a layer is taken along a direction normal to the main extension plane of this layer. Thus, a layer can typically have a thickness along z. The relative terms on, surmounts, under, underlying, upper, lower refer to positions taken along the direction z.
[0047] The terms vertical, vertically refer to a direction along z. The terms lateral, laterally refer to a direction in the plane xy.
[0048] An element located in vertical alignment with or to the right of another element, means that these two elements are both located on one same line perpendicular to a plane in which a lower or upper face of a substrate mainly extends, i.e. on one same line oriented vertically in the figures.
[0049] The terms substantially, around, about mean plus or minus 10%, or, when this is an angular orientation, plus or minus 10% and preferably plus or minus 5%. Thus, a direction substantially normal to a plane means a direction having an angle of 9010 with respect to the plane.
[0050]
[0051] The drain fingers D are connected through a connector 31 at a drain contact D. The connector 31 conventionally comprises vias and metal tracks.
[0052] The gate fingers G are connected through a connector 32 to a gate contact G. The connector 32 also conventionally comprises vias and metal tracks.
[0053] The source fingers S are connected through a connector 33 to a source contact S. The connector 33 also conventionally comprises vias and metal tracks.
[0054] Basic HEMT transistors T1, T2, T3 are typically formed on a substrate comprising a support layer 10, for example, silicon-based, and a GaN-based active layer 11. This active layer 11 can comprise, in a known manner, different GaN- and/or AlGaN-based sublayers, for example, buffer and/or germination layers. A barrier layer 12, typically AlGaN-based, makes it possible to form, in the active layer 11, a two-dimensional electron gas 2DEG. This 2DEG gas enables the circulation of a current between the drain finger D and the source finger S of a basic transistor. The circulation of the current is controlled by a voltage Vgs applied between the gate finger G and the source finger S. When this voltage is greater than the threshold voltage Vth of the transistor, the transistor is on. The voltage feature in the on-state (called first quadrant) of the HEMT transistor typically has a linear regime and a saturation regime. When the voltage Vgs is less than the threshold voltage Vth of the transistor, the transistor is off. The voltage feature in the off-state (called third quadrant) of the HEMT transistor does not only depend on the temperature. This feature is also impacted by the gate bias Vgs). It is therefore not possible to accurately determine the temperature of the HEMT transistor from the third quadrant feature.
[0055] To overcome this disadvantage, a structural modification of the device is performed.
[0056] As illustrated in
[0057] A determination of the local temperature of the device is therefore possible from the direct feature I(V), in the third quadrant, of the Schottky diode DS. The temperature sensor formed by the Schottky diode DS is advantageously totally integrated in the power microelectronic device.
[0058] Preferably, the disconnected gate finger CS and the source finger S are connected by a connector 35. This makes it possible to avoid forming a second diode in the opposite direction between the disconnected gate finger CS and the source finger S.
[0059] As illustrated in
[0060] As illustrated in
[0061] In
[0062] When the placement of the sensors within the matrix L1, L2, L3 is chosen, different measuring configurations can be considered.
[0063] According to an option illustrated in
[0064] According to an option illustrated in
[0065]
[0066] From the above, it clearly appears that the present invention makes it possible to integrate one or more accurate temperature sensors within a power microelectronic device comprising basic HEMT transistors. The invention is not limited to the embodiments described above.