H10P14/2926

GROUP-III NITRIDE SEMICONDUCTOR WAFER AND METHOD FOR PRODUCING SAME

The present invention is a group-III nitride semiconductor wafer including a group-III nitride semiconductor film on a substrate for film formation, in which in a cross-sectional shape of a surface of the substrate for film formation of a chamfered portion of the substrate in a diameter direction, a chamfering angle (.sub.1) relative to the surface of the substrate is 21 or more and 23 or less, and on the surface of the substrate in a diameter direction, a chamfering width (X.sub.1) is 500 m or more and 1000 m or less, which is a distance between an outer peripheral end portion of the substrate for film formation and an inner peripheral end portion of the chamfered portion. Thereby, the group-III nitride semiconductor wafer, in which the group-III nitride semiconductor film is provided on the substrate for film formation, and the method for producing the same are provided.

Systems and methods for processing a silicon surface using multiple radical species

A method of processing a silicon surface includes using a first radical species to remove contamination from the surface and to roughen the surface; and using a second radical species to smooth the roughened surface. Reaction systems for performing such a method, and silicon surfaces prepared using such a method, also are provided.

SiC epitaxial substrate manufacturing method and manufacturing device therefor

The present invention addresses the problem of providing a novel SiC epitaxial substrate manufacturing method and manufacturing device therefor. An SiC substrate and an SiC material, which has a lower doping concentration than said SiC substrate, are heated facing one another, and material is transported from the SiC material to the SiC substrate to form an SiC epitaxial layer. As a result, in comparison with the existing method (chemical vapour deposition), it is possible to provide an SiC epitaxial substrate manufacturing method with a reduced number of parameters to be controlled.

COMPOSITIONS, METHODS, AND DEVICES
20260055503 · 2026-02-26 ·

Disclosed herein are compositions, methods, and devices. Disclosed herein is a composition comprising a -(Al.sub.xGa.sub.1-x).sub.2O.sub.3, having an x value of less than about 5% and comprising at least one n-carrier dopant. Also disclosed are methods of making the same. Also disclosed are devices comprising the disclosed compositions.

Substrate for epitaxially growing diamond crystal and method of manufacturing diamond crystal
12563978 · 2026-02-24 · ·

Provided are a substrate for epitaxially growing a diamond crystal, having at least a surface made of a metal, in which the above surface made of the metal is a plane having an off angle of more than 0, and the full width at half maximum of the X-ray diffraction peak from the (002) plane by the X-ray rocking curve measurement at the above surface made of the metal is 300 seconds or less; and a method of manufacturing a diamond crystal, including epitaxially growing a diamond crystal on the above surface made of the metal of the above substrate.

SiC EPITAXIAL WAFER AND SiC DEVICE
20260049414 · 2026-02-19 · ·

A SiC epitaxial wafer according to an embodiment includes a SiC substrate, and a SiC epitaxial layer on one surface of the SiC substrate. The SiC epitaxial layer has a buffer layer and a drift layer. The buffer layer is located between the drift layer and the SiC substrate, and has an impurity concentration higher than an impurity concentration of the drift layer. The impurity concentration of the buffer layer is 2.010.sup.18 cm.sup.3 or more. In a case where the impurity concentration at a center in plan view in a laminating direction is measured in the laminating direction, uniformity of the impurity concentration in the buffer layer is 50% or less.

Laminated film, structure including laminated film, semiconductor element, electronic device, and method for producing laminated film

Provided are a crack-free laminated film and a structure including this laminated film. This laminated film includes: a buffer layer; and at least one layer of gallium nitride base film disposed on the buffer layer. Moreover, the compression stress of the entire laminated film is 2.0 to 5.0 GPa.

Schottky barrier diode with high withstand voltage
12557361 · 2026-02-17 · ·

A Schottky barrier diode, including a first n-type semiconductor layer including a -Ga.sub.2O.sub.3-based single crystal epitaxial layer and having a first carrier concentration that determines reverse breakdown voltage and forward voltage, a second n-type semiconductor layer including a -Ga.sub.2O.sub.3-based single crystal substrate and having a second carrier concentration that is higher than the first carrier concentration and determines forward voltage, a Schottky electrode provided on a surface of the first n-type semiconductor layer on the opposite side to the second n-type semiconductor layer, and an ohmic electrode provided on a surface of the second n-type semiconductor layer on the opposite side to the first n-type semiconductor layer. The -Ga.sub.2O.sub.3-based single crystal substrate includes a surface that has a plane orientation rotated by an angle of not more than 37.5 from a (010) plane.

Low-temperature deposition of high-quality aluminum nitride films for heat spreading applications

Provided are high quality metal-nitride, such as aluminum nitride (AlN), films for heat dissipation and heat spreading applications, methods of preparing the same, and deposition of high thermal conductivity heat spreading layers for use in RF devices such as power amplifiers, high electron mobility transistors, etc. Aspects of the inventive concept can be used to enable heterogeneously integrated compound semiconductor on silicon devices or can be used in in non-RF applications as the power densities of these highly scaled microelectronic devices continues to increase.

Forming a planar semiconductor surface

A method for producing a planar semiconductor surface includes forming a workpiece that has a carrier substrate, one or more insulating layers, a semiconductor layer, a first etch stop layer, and a second etch stop layer; forming a contact on the workpiece; biasing the workpiece to a second voltage through the contact; etching the second etch stop layer and part of the first etch stop layer with a photo-electrochemical etching and the second voltage that selectively removes the second etch stop layer faster than the first etch stop layer; biasing the workpiece to a first voltage through the contact; and etching the first etch stop layer and part of the semiconductor layer with the photo-electrochemical etching and the first voltage that selectively removes the first etch stop layer faster than the semiconductor layer to produce a semiconductor device with a planar surface on the semiconductor layer.