An optically-controlled switch is provided. The optically-controlled switch includes a circuit board including a transmission line and a photoconductive switching region that is adjacent to the transmission line and has electrical properties controllable by light and a laser located on the circuit board and configured to emit light toward the photoconductive switching region.

Novel tools and techniques are provided for implementing mixed dielectric materials for improving signal integrity of integrated electronics packages or semiconductor packages. In various embodiments, a substrate for a semiconductor device includes: a first layer made of a first material; a second layer made of a second material; and a third layer disposed between the first and second layers, and that is made of a third material different from the first and second materials. In some cases, the first, second, and third layers each contains a plurality of gas-filled regions (e.g., but not limited to, an aerogel core of the third layer and/or polymer resin matrix embedded with hollow silica spheres or aerogel spheres of the first and second layers, or the like). Coaxial ground shields around signal lines in the substrate can be used to improve signal integrity. High dielectric constant lossy lines between signal lines can reduce crosstalk.

A method of forming a hybrid waveguide semiconductor device is provided. The method includes forming a packaged radio frequency (RF) device and affixing a waveguide structure on the packaged RF device. The waveguide structure includes a non-conductive substrate and an air-filled waveguide formed in the substrate. A radiating element of the packaged RF device includes a pin structure connected to a die pad of a semiconductor die and a hat structure. The pin structure is embedded in an encapsulant of the packaged RF semiconductor device, and the hat structure is exposed within the air-filled waveguide.

A semiconductor device includes a receiving terminal for receiving a signal transmitted through a signal transmission line, a reference plane voltage terminal connected to a refence plane as a refence for the signal on the signal transmission line and a voltage generating circuit configured to generate a refence plane voltage to be supplied to the reference plane voltage terminal based on the signal received by the receiving terminal.

Disclosed herein are devices, systems, and methods related to edge couplers for providing wireless channel interconnects between edges of chiplets, components, modules, devices, packages, SoCs, etc. Such edge couplers may be formed from a stack of multiple layers and a core arranged between layers of the stack. A driven via extends from at least one feed layer of the stack of multiple layers into the core, wherein the driven via is isolated from ground. A plurality of grounded through-hole vias are grounded, extend from at least one ground layer of the stack, and traverse through the core, wherein the plurality of grounded through-hole vias partially surround the driven via.

Aspects of the disclosure advantageously provide circuits and methods using the same in signal transmission. In some embodiments, a circuit includes a signal transmission line configured to transmit a signal between two ports, the signal transmission line comprising a first transmit portion coupled to a second transmit portion via a first interconnect stage and the second transmit portion coupled to a third transmit portion via a second interconnect stage, wherein the second transmit portion comprises a quarter wavelength transmission line having a length that is a quarter of a wavelength of the signal being transmitted between the two ports. In some embodiments, the first interconnect stage and the second interconnect stage each comprise a contact pad having identical, or substantially similar, shape and size.

A semiconductor device includes: a first substrate including first front side pads arranged around a front surface; a second substrate including second front side pads arranged around a front surface; a third substrate; first connection members each electrically connecting a corresponding first front side pad on the first substrate and a corresponding third back side pad on the third substrate; second connection members each electrically connecting a corresponding second front side pad on the second substrate and a corresponding third front side pad on the third substrate; a first resin layer that is in contact with a periphery of the front surface of the first substrate and a periphery of the back surface of the third substrate; and a second resin layer that is in contact with a periphery of the front surface of the second substrate and a periphery of the back surface of the third substrate.

An apparatus includes a printed circuit board (PCB), a solder pad, a signal via, a plurality of metalized vias, and a waveguide. The PCB has a first surface opposite a second surface and includes a first metal layer, a second metal layer having a waveguide opening, and a PCB channel region from the waveguide opening in the second metal layer to the second surface. The solder pad is positioned on the first surface of the PCB over the channel region, and the signal via is coupled to the solder pad and a via pad in the second metal layer within the waveguide opening. The plurality of metalized vias extend from the first surface to the second surface of the PCB and form a boundary around the channel region. The waveguide is affixed to the waveguide opening in the second metal layer.

In one aspect, in general, an apparatus for transmitting signals between an integrated circuit device and a signal carrying structure comprises: a first interface comprising a plurality of device coupling transmission lines (DCTLs) distributed along a first axis contained within a first plane, each DCTL comprising at least two conductor strips distributed along the first axis and substantially coplanar with the first plane; a second interface comprising a plurality of signal carrying structure coupling transmission lines (SCSCTLs) distributed along a second axis, wherein each SCSCTL comprises at least two conductor strips distributed along a respective axis that is substantially perpendicular to the second axis; and a transition region between the first interface and the second interface comprising a transition structure comprising different respective conductors connecting each conductor strip of a DCTL to a respective conductor strip of a corresponding SCSCTL.

According to one embodiment, a semiconductor device includes a first transistor and a second transistor whose source electrodes are electrically coupled to each other; a light emitter; a light receiver including a first cathode electrode and a second cathode electrode and configured to turn the first transistor and the second transistor on or off, depending on a light emission state of the light emitter; a first filter electrically coupling the first cathode electrode of the light receiver and the source electrode of the first transistor; and a second filter electrically coupling the second cathode electrode of the light receiver and the source electrode of the second transistor.