An object of the present invention is to provide a GaN crystal long in light emission lifetime by time-resolved photoluminescence measurement and provide high-quality GaN crystal and GaN substrate that have few specified crystal defects affecting the light emission lifetime. A gallium nitride crystal having a light emission lifetime by time-resolved photoluminescence measurement, of 5 ps or more and 200 ps or less, and satisfying at least one of the following requirement (i) and requirement (ii): (i) an FWHM in a 004 diffraction X-ray rocking curve is 50 arcsec or less at least one position of the crystal; and (ii) a dislocation density is 510.sup.6 cm.sup.2 or less.

A method of forming silicon within a gap on a surface of a substrate. The method includes use of two or more pyrometers to measure temperatures at two or more positions on a substrate and/or a substrate support and a plurality of heaters that can be divided into zones of heaters, wherein the heaters or zones of heaters can be independently controlled based on the measured temperatures and desired temperature profiles.

The method provides for the growth of an epitaxial layer (200) made of a first semiconductor material on a substrate (100) made of a second semiconductor material; the materials are different and have different CTEs; the method comprises the steps of: A) patterning the substrate (100) by an etching process so to form an array of pillars (110), the pillars (110) being laterally spaced from each other and having a top section (112) larger than a bottom section (114) and/or intermediate sections (116), B) depositing the second semiconductor material on top of the pillars (110) at a growth temperature so to form an epitaxial layer (200) generated by vertical and lateral growth, and C) inducing breaking of the pillars (110) by cooling the substrate (100) and the epitaxial layer (200) below the growth temperature.

The present application provides a substrate and a manufacturing method therefor. The substrate includes a silicon substrate and a protective layer, the silicon substrate includes a middle part and an edge part, and a thickness of the middle part is greater than a thickness of the edge part. The middle part has a to-be-grown surface, and a crystal orientation of the to-be-grown surface is different from a crystal orientation of surface of the edge part. The protective layer covers the edge part and is configured to prevent defects in the edge part from extending to the middle part during high-temperature processing.

Methods for transferring graphene to substrates include at least a method for transferring a graphene-metal bilayer to a substrate to form a laminate thereof. The method can include applying a first continuous polymer layer to a graphene layer of the graphene-metal bilayer; applying a first discontinuous polymer layer to the first continuous polymer layer; applying a second continuous polymer layer to a metal layer of the graphene-metal bilayer; applying a second discontinuous polymer layer to the second continuous polymer layer; etching the first continuous polymer layer with a first etchant through the first discontinuous polymer layer; laminating the substrate by pressing the face of the graphene layer into a surface of the substrate; etching the second continuous polymer layer with a second etchant through the second discontinuous polymer layer, thereby transferring the graphene-metal bilayer to the substrate to form the laminate.

Porous III-nitrides having controlled/tuned optical, electrical, and thermal properties are described herein. Also disclosed are methods for preparing and using such porous III-nitrides.

A method of processing a composite structure including a thin layer of single-crystal silicon carbide disposed on a polycrystalline silicon carbide carrier substrate, includes, after formation of electronic component elements on a front face of the composite structure, grinding a rear face of the composite structure and removing a work-hardened layer present on the surface of the rear face as a result of the grinding process.

The present disclosure relates to vertical stacks including heterolayers, as well as processes and methods of their manufacture. Also described herein are apparatuses and systems for preparing and making such stacks.

A silicon carbide (SiC) semiconductor device is proposed. The SiC semiconductor device includes a buffer layer of a first conductivity type and a drift layer of the first conductivity type arranged, along a vertical direction, on the buffer layer. A vertical profile of a doping concentration of the buffer layer includes at least a first valley portion, a first plateau portion and a first transition portion extending from the first valley portion to the first plateau portion. The doping concentration of each of the first valley portion or the first plateau portion varies by less than 20 %. A vertical extent of the first transition portion ranges from 1 % to 30 % of a vertical extent of the first valley portion.

A system and method for performing is laser induced forward transfer (LIFT) of 2D materials is disclosed. The method includes generating a receiver substrate, generating a donor substrate, wherein the donor substrate comprises a back surface and a front surface, applying a coating to the front surface, wherein the coating includes donor material, aligning the front surface of the donor substrate to be parallel to and facing the receiver substrate, wherein the donor material is disposed adjacent to the target layer, and irradiating the coating through the back surface of the donor substrate with one or more laser pulses produced by a laser to transfer a portion of the donor material to the target layer. The donor material may include Bi.sub.2Se.sub.(3-x)S.sub.x, MOS.sub.2, hexagonal boron nitride (h-BN) or graphene. The method may be used to create touch sensors and other electronic components.