Patent classifications
H10W44/248
SEMICONDUCTOR PACKAGE AND METHOD FOR FORMING THE SAME
A semiconductor package and a method for forming a semiconductor package are provided. The semiconductor package includes a first substrate, a first integrated circuit (IC), an antenna, a molding compound, a shielding layer, and a first shielding wall structure. The first substrate includes a first surface and a second surface opposite to each other, The antenna is located close to the first surface of the first substrate. The first integrated circuit (IC) is mounted on the second surface of the first substrate and coupled to the antenna. The molding compound encapsulates the first IC. The shielding layer covers the molding compound. The first shielding wall structure is embedded in the first substrate and coupled to the shielding layer.
Three-dimensional fan-out integrated package structure, packaging method thereof, and wireless headset
A three-dimensional fan-out integrated package structure, a packaging method thereof, and a wireless headset are disclosed. The three-dimensional fan-out integrated package structure includes a first rewiring layer, a second rewiring layer, a metal connection pillar, a first semiconductor chip, a second semiconductor chip, a first filler layer, a first encapsulating layer, a functional chip, a second filler layer, a second encapsulating layer, and metal bumps. By stacking two semiconductor chips, the structure can effectively reduce the packaging area and realize device packaging with high density and high integration, while enabling the minimum line width/line spacing to be reduced to 1.5 m/1.5 m. In addition, the three-dimensional fan-out integrated package structure can simultaneously integrate various functional chips and components such as GPU/PMU/DDR/mm-wave antenna/capacitor/inductor/transistor/flash memory/filter to realize system-level packaging, which not only can reduce cost but also improve the effectiveness of the package structure by using physical isolation to reduce device interference.
Photonically steered impedance surface antennas
Photonically steered impedance surface antennas are disclosed. A disclosed example apparatus includes a semiconductor substrate to be communicatively coupled to a radio frequency (RF) source, an at least partially transparent dielectric layer, the semiconductor substrate at a first side of the at least partially transparent dielectric layer, an at least partially transparent conductive film at a second side of the at least partially transparent dielectric layer that is opposite the first side of the at least partially transparent dielectric layer, and an illumination source to illuminate at least a portion of the semiconductor substrate to generate a photoinduced solid-state plasma pattern that beam steers an RF signal corresponding to the RF source.
High-frequency module and communication device
A high-frequency module includes a first module substrate including first and second major surfaces, and a second module substrate including third and fourth major surfaces. The first major surface (faces the second major surface. Electronic components are disposed between the second and third major surfaces, on the first major surface, and on the fourth major surface. External connection terminals are disposed on the fourth major surface. A recess is formed in the first major surface. The electronic components include a first electronic component and a second electronic component (shorter in height than the first electronic component. The first electronic component is disposed in the recess, and the second electronic component is disposed in a region outside of the recess on the first major surface.
Semiconductor device with through package via and method therefor
A method of forming a semiconductor device is provided. The method includes encapsulating with an encapsulant at least a portion of a semiconductor die and a package substrate, the encapsulant including an additive selectively activated by way of a laser. A first opening is formed in the encapsulant, the first opening exposing a predetermined first portion of the package substrate. The additive is activated at the sidewalls of the first opening. A second opening is formed in the encapsulant, the second opening encircling the first opening and exposing a predetermined second portion of the package substrate. The additive is activated at the sidewalls the second opening. A conductive material is plated on the additive activated portions of the encapsulant.
Biological sensing system having micro-electrode array
A biological sensing system, comprising a microelectrode array having a plurality of islands that are thermally isolated from each other and are interconnected by flexible nano-scale wires. An embedded complementary metal oxide semiconductor (CMOS) instrumentation amplifier and wireless communication circuitry may be operatively connected to the microelectrode array and embedded within input/output pads connected to the wires at the periphery of the array.
SEMICONDUCTOR DEVICES AND METHOD FOR FORMING THE SAME
A phase change material switching circuit may be provided by forming a semiconductor circuit including a power amplifier and a low noise amplifier on a substrate; forming metal interconnect structures embedded in first dielectric material layers over the power amplifier and the low noise amplifier; forming a first phase change material (PCM) switch and a second PCM switch over the first dielectric material layers, wherein the first PCM switch includes a first electrode and a second electrode, and the second PCM switch includes a third electrode and a fourth electrode, wherein the second electrode is electrically connected to the third electrode to form a common electrical node; and electrically connecting a radio-frequency (RF) antenna to the common electrical node.
ELECTRONIC DEVICE
The present disclosure provides an electronic device. The electronic device includes a die, a thermal dissipation structure, and an encapsulant. The thermal dissipation structure is disposed over the die. The thermal dissipation structure has a thickness tapered along a direction far from the die. The encapsulant encapsulates the die and the thermal dissipation structure. An upper surface of the thermal dissipation structure is exposed by the encapsulant.
SUBSTRATE HAVING A METAL LAYER COMPRISING A MARKING
A method of marking information on a substrate for use in a semiconductor component is provided. The method comprises providing a substrate for use in a semiconductor component, providing a metal layer on a surface of the substrate, and providing a marking within the metal layer. A method of making a die, a radio-frequency module and a wireless mobile device; as well as a substrate, a die, a radio-frequency module and a wireless mobile device is also provided.
Electronic packaging structure and manufacturing method thereof
An electronic packaging structure including a first circuit structure, a second circuit structure and at least one electronic device is provided. The first circuit structure includes a bottom conductive plate having at least one cavity. The first circuit structure is disposed on the second circuit structure. The first circuit structure and the second circuit structure are electrically connected to each other. The electronic device is disposed on the second circuit structure. The electronic device is disposed corresponding to the cavity of the first circuit structure.