Disclosed structures and methods include a chip including a transistor between an insulator layer and dielectric material layers. The transistor includes: within an active device region, source and drain regions and stacked body and channel regions laterally between the source and drain regions; and a gate structure on a surface of the active device region adjacent to and between the channel region and the dielectric material layers. Alternatively, the transistor includes: within an active device region, a source region laterally between drain and stacked body and channel regions laterally between the source region and each drain region; and gate structures on a surface of the active device region adjacent to and between the channel regions, respectively, and the dielectric material layers. In any case, a local interconnect adjacent to another surface of the active device region opposite the gate structure(s) electrically couples the body region to the source region(s).

A method comprises: covering at least part of the integrated circuit with a material, the material including an opening that penetrates through the material; and forming a layer of nanoparticles on at least part of an internal wall of the opening and over at least part of the integrated circuit.

Methods, devices, and systems for driving optical modulators. An example integrated circuit includes a driver including a first circuit having a first switch coupled between a first input and a first output and a second circuit having a second switch coupled between a second input and a second output. Each of the first and second switches is configured to receive a control signal adjustable to control a corresponding signal path with a corresponding input electronic signal. The first and second circuits are configured to control a rising edge and a falling edge of an output electronic signal at an output of the driver that is based on a first output electronic signal at the first output and a second output electronic signal at the second output. The output of the driver is electrically coupled to the optical modulator to provide the output electronic signal to modulate an optical signal.

A semiconductor device includes a conductive structure, a first dielectric layer, a second dielectric layer and a liner layer. The conductive structure is located on a substrate. The first dielectric layer covers the conductive structure and the substrate. The second dielectric layer is located on the first dielectric layer. An air gap is present in the first dielectric layer and the second dielectric layer, and is located above the conductive structure. The liner layer covers and surrounds a middle portion of the air gap.

A semiconductor structure is provided. The semiconductor structure includes a first substrate and a second substrate. The first substrate includes a first semiconductor layer, including a first trench isolation that extends through a portion of the first substrate layer; and a first interconnect structure, disposed over the first semiconductor layer. The second substrate includes a second semiconductor layer, including a plurality of semiconductor islands and surrounded by at least a second isolation penetrating the second semiconductor layer; a second interconnect structure, disposed over the second substrate layer and bonded to the first interconnect structure; and a dielectric layer, disposed over the second semiconductor layer opposite to the second interconnect structure. A method of manufacturing the semiconductor structure is also provided.

A semiconductor device includes: a first conductive structure that comprises a first portion having sidewalls and a bottom surface, wherein the first conductive structure is embedded in a first dielectric layer; and an isolation layer comprising a first portion and a second portion, wherein the first portion of the isolation layer lines the sidewalls of the first portion of the first conductive structure, and the second portion of the isolation layer lines at least a portion of the bottom surface of the first portion of the first conductive structure.

Integrated circuit devices and methods of forming the same are provided. The integrated circuit devices may include a transistor including a channel region and a source/drain region contacting the channel region, a power rail that is configured be electrically connected to a power source and is spaced apart from the source/drain region in a first direction, and a power contact that is between the source/drain region and the power rail and contacts both the source/drain region and the power rail. The channel region may overlap the power contact in the first direction.

Provided is a semiconductor structure, a test structure, a manufacturing method and a test method. The semiconductor structure includes a substrate, which includes multiple pillars spaced along a first direction by first trenches; second trenches formed at opposite sides along a second direction of each of the pillars; target conductive structures extending along the second direction in the substrate directly below adjacent second trenches; and a first dielectric layer, a conductive layer and a second dielectric layer sequentially stacked in the first trenches and the second trenches. A depth of the first trenches is greater than that of the second trenches. The first direction intersects the second direction.

The present application discloses a contact structure, a semiconductor device including the contact structure, and a method for fabricating the semiconductor device. The contact structure includes a body portion; and an extending portion downwardly extending from the body portion and including a groove. The groove is recessed from a bottom surface of the extending portion, leading towards the body portion, and exposing the body portion.

Integrated circuit structures including an interconnect feature without a higher-resistance liner material. In absence of a liner, metal of low resistance directly contacts an adjacent dielectric material, enabling lower resistance interconnect. Even for low-k dielectric compositions, adhesion of the metal to the dielectric material is improved through the incorporation of nitrogen proximal to the interface. Prior to deposition of the metal upon a surface of the dielectric, the surface is exposed to nitrogen species to form a nitrogen-rich compound at the surface. The metal deposited upon the surface may then be nitrogen-lean, for example a substantially pure elemental metal or metal alloy.