Provided are a silicon precursor having a heterocyclic group, a composition for depositing a silicon-containing layer including the same, and a method of depositing a silicon-containing layer using the same. The silicon precursor is represented by Formula 1. ##STR00001## In Formula 1, A.sup.1 is a heterocyclic group including one or more nitrogen, and R.sup.1 is hydrogen or an alkyl group of 16 carbon atoms. R.sup.2 and R.sup.3 may be each independently an alkyl group of 16 carbon atoms.

The present application provides a method of fabricating a conductive feature. The method of fabricating the conductive feature includes steps of depositing an insulative layer on a substrate, forming a trench in the insulative layer, performing a cyclic process comprising a sequence of a deposition step and a removal step to deposit a conductive material in the trench until the deposition step has been performed is equal to a first preset number of times and a number of the times the removal step has been performed is equal to a second preset number of times, and filling the trench with the conductive material after the cyclic process.

The present disclosure provides a method for forming an integrated circuit (IC) structure. The method comprises providing a substrate including a conductive feature; forming aluminum (Al)-containing dielectric layer on the conductive feature; forming a low-k dielectric layer on the Al-containing dielectric layer; and etching the low-k dielectric layer to form a contact trench aligned with the conductive feature. A bottom of the contact trench is on a surface of the Al-containing dielectric layer.

A method for manufacturing a semiconductor structure includes: forming a first bonding layer on a device substrate, the first bonding layer including a first bonding sub-layer and a second bonding sub-layer, the first bonding sub-layer including a first metal oxide material in an amorphous state and a plurality of metal nanoparticles, the second bonding sub-layer including a second metal oxide material in an amorphous state; forming a second bonding layer on a carrier substrate, the second bonding layer including a third metal oxide material in an amorphous state; conducting a surface modification process on the first and second bonding layers; bonding the device and carrier substrates to each other through the first and second bonding layers; and annealing the first and second bonding layers to convert the first, second, and third metal oxide materials from the amorphous state to a crystalline state.

Examples are disclosed relate to using an inhibitor with a silicon oxide ALD deposition process to refill recesses in STI regions. One example provides a method of processing a substrate. The method comprises depositing an inhibitor on the substrate, wherein a concentration of the inhibitor on a gate structure of the substrate is greater relative to the concentration of the inhibitor on a recessed shallow trench isolation (STI) region of the substrate. The method further comprises depositing a layer of silicon oxide on the substrate, the inhibitor inhibiting growth of the layer of silicon oxide such that the layer of silicon oxide is thicker on the recessed STI region and thinner on the gate structure.

Methods, systems, and media for deposition control in a process chamber are provided. In some embodiments, a method comprises (a) obtaining, at a present time, information indicating a status of one or more components of the process chamber during performance of a deposition process on one or more wafers. The method may comprise (b) determining whether adjustments to one or more control components of the process chamber are to be made by providing an input based on the obtained information to a trained machine learning model configured to determine adjustments as an output, wherein the adjustments to the one or more control components cause a change in the deposition process. The method may comprise (c) transmitting instructions to a controller of the process chamber that cause the adjustments to the one or more control components to be implemented.

Embodiments of improved process flows and methods are provided to pattern a semiconductor substrate using direct self-assembly (DSA) of metalate salt ionic liquid crystals (ILCs) having metalate anions. After self-assembly of the metalate salt ILCs into ordered structures, an oxidation process is used to remove the organic components of the ordered structures and convert the metalate anions into metal oxide patterns. In addition to providing a robust metal oxide pattern, which can be transferred to the underlying substrate, the process flows and methods disclosed herein enable ILCs to be used as pitch multipliers in advanced patterning techniques.

A part is adapted to be used in a semiconductor processing equipment. The part includes a substrate and a protective coating. The protective coating covers at least a part of the substrate, is made of silicon carbide, and has an atomic ratio of carbon in the protective coating increases in a direction away from the substrate while an atomic ratio of silicon in the protective coating decreases in the direction. The atomic ratio of silicon in the protective coating is larger than that of the carbon near the substrate, and the atomic ratio of silicon in the protective coating is smaller than that of carbon near the outer surface of the protective coating. A method for making the part is also provided.

A method of depositing an atomic layer is provided. The method includes a plurality of deposition cycles. Each of the plurality of deposition cycles includes rotating a valve plate included in an exhaust port by a first angle while supplying a precursor to a chamber into which a substrate is loaded, rotating the valve plate by a second angle while supplying a purge gas to the chamber, rotating the valve plate by a third angle while supplying a reactor to the chamber, and rotating the valve plate by the second angle while supplying the purge gas to the chamber, and wherein the first angle, the second angle, and the third angle are certain angles between an upper surface of the valve plate and a virtual plane vertical to an internal path of the exhaust port, and the first angle differs from the third angle.

Various embodiments of methods are provided to control formation of self-assembled monolayers (SAMs) used in an area-selective deposition (ASD) process, and thus, prevent defects in the ASD process. In the disclosed embodiments, a SAM structure is formed via a spin-on process that includes: (a) a spin coating step for coating a surface of a semiconductor substrate with a liquid solution containing SAM-forming molecules, the semiconductor substrate having a target material and a non-target material exposed on the substrate surface, and (b) an anneal step for heat treating the semiconductor substrate to chemically bond the SAM-forming molecules to the non-target material exposed on the substrate surface. By controlling and/or varying process parameter(s) utilized during the anneal step, the embodiments disclosed herein improve the selectivity of the SAM structure to the non-target material and prevent defects from occurring when a film is subsequently deposited onto the target material.