A method for making a dense organosilicon film with improved mechanical properties, the method comprising the steps of: providing a substrate within a reaction chamber; introducing into the reaction chamber a gaseous composition comprising hydrido-dimethyl-alkoxysilane; and applying energy to the gaseous composition comprising hydrido-dimethyl-alkoxysilane in the reaction chamber to induce reaction of the gaseous composition comprising hydrido-dimethyl-alkoxysilane to deposit an organosilicon film on the substrate, wherein the organosilicon film has a dielectric constant from 2.70 to 3.50, an elastic modulus of from 6 to 36 GPa, and an at. % carbon from 10 to 36 as measured by XPS.

An ultraviolet (UV) lamp assembly of a UV curing tool is provided for curing a low dielectric constant (low-k) material layer of a semiconductor wafer. The UV lamp assembly includes: a UV lamp which emits UV light; a first reflector arranged proximate to a first side of the UV lamp, the first reflector including a first surface facing the UV lamp from which UV light emitted by the UV lamp is at least partially reflected; and a UV reflective coating partially coating the first surface of the reflector. Suitably, a plurality of areas of the first surface of the reflector remain uncoated with the UV reflective coating and the plurality of uncoated areas are arranged to promote a uniform exposure of the semiconductor wafer to UV irradiation.

A method comprises: covering at least part of the integrated circuit with a material, the material including an opening that penetrates through the material; and forming a layer of nanoparticles on at least part of an internal wall of the opening and over at least part of the integrated circuit.

A method for developing a passivation film on a substrate with less than 10 atomic % of hydrogen includes providing the substrate within a processing station of a substrate processing system. A resultant passivation film is formed with less than 10 atomic % of hydrogen on the substrate by performing the following steps of depositing a passivation film sub-layer on the substrate, where the passivation film sub-layer lays on a semiconductor device layer or directly on a previously deposited passivation film sub-layer, and after depositing the passivation film sub-layer, performing a post plasma treatment to the passivation film sub-layer with at least one of nitrogen and argon to reduce hydrogen content within the passivation film sub-layer.

A topology-selective deposition method is disclosed. An exemplary method includes providing an inhibition agent comprising a first nitrogen-containing gas, providing a deposition promotion agent comprising a second nitrogen-containing gas to form an activated surface on one or more of a top surface, a bottom surface, and a sidewall surface relative to one or more of the other of the top surface, the bottom surface, and the sidewall surface, and providing a precursor to react with the activated surface to thereby selectively form material comprising a nitride on the activated surface.

To enable formation of a film that protects a sidewall of a pattern and is good in film quality, low in etching rate, and good in coverage of the sidewall, a film formation method includes a first step of supplying a gas into a vacuum processing chamber while generating plasma, and forming a film with the generated plasma on a surface of a substrate to be processed, a second step of removing halogen with plasma after the first step, and a third step of oxidizing or nitriding the film with plasma after the second step.

A method of manufacturing a semiconductor device includes forming a gate oxide layer on a substrate, where the substrate includes a high voltage region and a low voltage region. The gate oxide layer is disposed in the high voltage region. Wet etching is performed on the gate oxide layer to reduce a thickness of the gate oxide layer. Multiple trenches are formed around the high voltage region in the substrate, where forming the trenches includes removing an edge of the gate oxide layer to make the thickness of the gate oxide layer uniform. An insulating material is filled in the trenches to form multiple shallow trench isolation structures, where an upper surface of the shallow trench isolation structures close to the edge of the gate oxide layer is coplanar with an upper surface of the gate oxide layer.

A method includes forming a conductive material on a first dielectric layer, exposing the conductive material to aniline to produce a passivated surface of the conductive material, and after exposing the conductive material to aniline, forming a second dielectric layer on the first dielectric layer using a deposition process. The deposition process is a water-free and plasma-free deposition process, and the second dielectric layer does not form on the passivated surface of the conductive material.

The present disclosure provides a semiconductor device structure and a method for preparing the semiconductor device structure. The semiconductor device structure includes a first conductive layer disposed over a semiconductor substrate; a first dielectric layer disposed over the first conductive layer; an energy-removable layer conformally deposited over the first dielectric layer in a pattern-dense region; a patterned mask disposed over the first dielectric layer and the energy-removable layer, wherein the patterned mask includes a first pattern disposed in the pattern-dense region, a second pattern disposed over a sidewall of the first pattern, and a third pattern disposed in a pattern-loose region; and a plurality of processed areas disposed on a top surface of the energy-removable layer and between two adjacent first patterns and also disposed on the first pattern. A second critical dimension of the second pattern is smaller than a first critical dimension of the first pattern.

Exemplary methods of semiconductor processing may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The substrate may define one or more features along the substrate. The methods may include depositing a silicon-containing material on the substrate. The silicon-containing material may extend within the one or more features along the substrate. The methods may include providing an oxygen-containing precursor. The methods may include annealing the silicon-containing material with the oxygen-containing precursor. The annealing may cause the silicon-containing material to expand within the one or more features. The methods may include repeating one or more of the operations to iteratively fill the one or more features on the substrate.