A method of processing a bonded wafer formed by bonding a first wafer and a second wafer to each other via a bonding layer includes a coordinate generating step of generating coordinates of an undersurface position of the first wafer, the undersurface position being to be irradiated with laser beams, such that an end position of a crack extending from modified layers formed within the first wafer is located at an outer circumference of the bonding layer, and a modified layer forming step of forming a plurality of modified layers in a ring shape by irradiating the coordinates generated in the coordinate generating step with the laser beams of a wavelength transmissible through the first wafer.

A method of forming a semiconductor device includes mounting a bottom wafer on a bottom chuck and mounting a top wafer on a top chuck, wherein one of the bottom chuck and the top chuck has a gasket. The top chuck is moved towards the bottom chuck. The gasket forms a sealed region between the bottom chuck and the top chuck around the top wafer and the bottom wafer. An ambient pressure in the sealed region is adjusted. The top wafer is bonded to the bottom wafer.

An apparatus and method for debonding a pair of bonded wafers are disclosed herein. In some embodiments, the debonding apparatus, comprises: a wafer chuck having a preset maximum lateral dimension and configured to rotate the pair of bonded wafers attached to a top surface of the wafer chuck, a pair of circular plate separating blades including a first separating blade and a second separating blade arranged diametrically opposite to each other at edges of the pair of bonded wafers, wherein the first and the second separating blades are inserted between a first and a second wafers of the pair of bonded wafers, and at least two pulling heads configured to pull the second wafer upwardly so as to debond the second wafer from the first wafer.

Representative techniques provide process steps for forming a microelectronic assembly, including preparing microelectronic components such as dies, wafers, substrates, and the like, for bonding. One or more surfaces of the microelectronic components are formed and prepared as bonding surfaces. The microelectronic components are stacked and bonded without adhesive at the prepared bonding surfaces.

The invention relates to a method for annealing of at least two wafers bonded via low-temperature direct bonding comprising heating the bonded wafers up to a first annealing temperature in the range of 100 C. to 500 C., preferably 150 C. to 400 C., even more preferred 150 C. to 200 C., holding the first annealing temperature in a range of 1 to 4 hours, preferably 1 to 3 hours, cooling down the bonded wafers to room temperature, re-heating the bonded wafers to a second annealing temperature in the range of 100 C. to 500 C., preferably 150 C. to 400 C., even more preferred 150 C. to 200 C., and cooling down the bonded wafers to room temperature.

A semiconductor device has a substrate made of a first semiconductor material. The first semiconductor material is silicon carbide. A first semiconductor layer made of the first semiconductor material is disposed over the substrate. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The first semiconductor material is substantially defect-free silicon carbide, and the second semiconductor material is silicon. A semiconductor device is formed in the second semiconductor layer. The semiconductor device can be a power MOSFET, diode, insulated gate bipolar transistor, cluster trench insulated gate bipolar transistor, and thyristor. The second semiconductor layer with the electrical component provides a first portion of a breakdown voltage for the semiconductor device and the first semiconductor layer and substrate provide a second portion of the breakdown voltage for the semiconductor device.

A method of direct bonding comprising the following steps: supplying a first substrate and a second substrate, the first substrate being covered by a first hydrophilic surface and the second substrate being covered by a second hydrophilic surface, deposition of a specific molecule on the first hydrophilic surface and/or on the second hydrophilic surface, the specific molecule comprising a hydrophilic functional group and a basic functional group, separated by at least one atom, contacting the first hydrophilic surface with the second hydrophilic surface, whereby the two hydrophilic surfaces are bonded one with the other, and the first substrate and the second substrate are assembled, optionally, application of a bonding annealing heat treatment, preferably at a temperature less than or equal to 500 C.

As an example, the present invention relates to a hybrid bonding method using an organic insulating layer as an insulating layer. In the hybrid bonding method using an organic insulating layer, there may be a difference in thermal expansion between a terminal electrode made of metal or the like and the organic insulating layer due to heating at the time of bonding, and it is necessary to provide a predetermined level difference D between a tip end surface of the terminal electrode and a surface of the organic insulating layer in advance. In the present invention, in order to provide the level difference D, the surface of the semiconductor substrate 100 is irradiated with plasma (e.g. argon plasma). In this plasma irradiation, an organic insulating layer 102 is etched with plasma such that a surface 102a of the organic insulating layer 102 of the semiconductor substrate 100 is on the farther side than a tip end surface 103a of an electrode 103.

A method of processing a wafer includes forming a bonded wafer assembly by bonding one of opposite surfaces of a first wafer to a second wafer, the first wafer having a device region and an outer circumferential excessive region, applying a laser beam to the first wafer while positioning a focused spot of the laser beam radially inwardly from the outer circumferential edge of the first wafer, on an inclined plane that is progressively closer to the one of the opposite surfaces of the first wafer toward the outer circumferential edge, thereby forming a separation layer shaped as a side surface of a truncated cone, grinding the first wafer from the other one of the opposite surfaces thereof to thin down the first wafer to a predetermined thickness, and detecting whether or not the outer circumferential excessive region has been removed from the first wafer.

A method for producing a semiconductor structure comprises: a) providing a working layer of a semiconductor material; b) providing a carrier substrate of a semiconductor material; c) depositing a thin film of a semiconductor material different from that or those of the working layer and the carrier substrate on a free face to be joined of the working layer and/or the carrier substrate; d) directly joining the free faces of the working layer and the carrier substrate, e) annealing the joined structure at an elevated temperature to bring about segmentation of the encapsulated thin film and form a semiconductor structure comprising an interface region between the working layer and the carrier substrate, the interface region comprising: regions of direct contact between the working layer and the carrier substrate; and agglomerates comprising the semiconductor material of the thin film adjacent the regions of direct contact.