H10P14/2909

Semiconductor Device With Selective Area Epitaxy Growth Utilizing a Mask to Suppress or Enhance Growth at the Edges

A method of Selective Area Epitaxy (SAE) on a semiconductor wafer is disclosed. A dielectric mask is deposited on the wafer surface to define an opening for epitaxial growth. The mask includes a zigzag edge formed by successive straight facets oriented to avoid crystallographic directions associated with unintentional growth enhancement. During SAE, a semiconductor layer is grown in the opening such that edge-growth enhancement at the zigzag edge is suppressed relative to straight edges aligned with [011] or [0 11] directions. By replacing straight mask edges with zigzag geometry, fragile linear overgrowth is avoided, reducing particulate contamination and improving device reliability. The zigzag edge may be tailored by pitch, amplitude, or facet orientation, including angles such as 34, 56, 124, or 146 relative to [011]. The method is applicable to III-V materials, including InP-based photonic integrated circuits, lasers, modulators, and amplifiers.