A piezoelectric actuator comprises a substrate, an insulator layer on the substrate, and a piezo actuator stack on the insulator layer. The piezo actuator stack comprises an insulator-adjacent electrode on the insulator layer. A piezo layer having a tapered sidewall resides on a portion of the insulator-adjacent electrode. An insulator-distal electrode on the piezo layer having a taper-adjacent edge offset from an intersection of the tapered sidewall of the piezo layer and the insulator-adjacent electrode.

Micro gas chromatographic devices are provided having a microfluidic separation column and a plurality of capillaries where the capillaries have been independently configured in terms of the capillary length, capillary width, the packing density and packing geometry of the capillary using one or more micro pillars, the tortuosity of the capillary path, and the presence and identity of the stationary phase for use in micro gas chromatographic separation of complex mixtures of compounds. Through the plurality of capillaries, the devices are capable of discriminating between complex samples even in instances where complete separation of the components is not possible. Methods of fabrication and methods of use of the devices are also provided. The devices can be readily fabricated using known techniques. The devices can be used for the analysis of complex mixtures of compounds containing tens or hundreds of compounds in which just a few differ in presence or concentration.

A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate having a first surface and a second surface arranged opposite to the first surface; a stress-sensitive sensor disposed at the first surface of the substrate, where the stress-sensitive sensor is sensitive to mechanical stress; a stress-decoupling trench that has a vertical extension that extends from the first surface into the substrate, where the stress-decoupling trench vertically extends partially into the substrate towards the second surface although not completely to the second surface; and a plurality of particle filter trenches that vertically extend from the second surface into the substrate, wherein each of the plurality of particle filter trenches have a longitudinal extension that extends orthogonal to the vertical extension of the stress-decoupling trench.

A component intended to be in friction contact with another component, the component being coated with an electrically conductive layer in one piece, at least partially covering every surface of the component, the friction occurring on at least one of these surfaces, called the functional surface, the functional surface being surrounded by a plurality of side surfaces, the component having on its functional surface a texture formed of a succession of troughs coated with the electrically conductive layer, the troughs each extending between two side surfaces such that the electrically conductive layer remains in one piece over the component despite the wear caused by friction on the functional surface. The invention also relates to the method for manufacturing the component by the DRIE (deep reactive ion etching) process, wherein surface defects on the sides machined by the DRIE process are used to form the troughs.

A method of manufacturing a plurality of resonators, each formed by a membrane sealing a cavity, includes forming a plurality of cavities starting from one face called the front face of a support substrate, the plurality of cavities comprising central cavities and peripheral cavities arranged around the assembly formed by the central cavities, and forming central membranes and peripheral membranes covering the central cavities and peripheral cavities, respectively, by the transfer of a coverage film on the front face of the support substrate. At least part of the peripheral membranes is removed.

In an embodiment, a method for manufacturing a micro-electro-mechanical systems (MEMS) transducer device includes providing a substrate body with a surface, depositing an etch-stop layer (ESL) on the surface, depositing a sacrificial layer on the ESL, depositing a diaphragm layer on the sacrificial layer and removing the sacrificial layer, wherein depositing the sacrificial layer includes depositing a first sub-layer of a first material and depositing a second sub-layer of a second material, and wherein the first material and the second material are different materials.

The disclosure relates to a method for manufacturing a planarized etch-stop layer, ESL, for a hydrofluoric acid, HF, vapor phase etching process. The method includes providing a first planarized layer on top of a surface of a substrate, the first planarized layer having a patterned and structured metallic material and a filling material. The method further includes depositing on top of the first planarized layer the planarized ESL of an ESL material with low HF etch rate, wherein the planarized ESL has a low surface roughness and a thickness of less than 150 nm, in particular of less than 100 nm.

In an embodiment, an integrated MEMS transducer device includes a substrate body having a first electrode on a substrate, an etch stop layer located on a surface of the substrate, a suspended micro-electro-mechanical systems (MEMS) diaphragm with a second electrode, an anchor structure with anchors connecting the MEMS diaphragm to the substrate body and a sacrificial layer in between the anchors of the anchor structure, the sacrificial layer including a first sub-layer of a first material, wherein the first sub-layer is arranged on the etch stop layer, a second sub-layer of a second material, wherein the second sub-layer is arranged on the first sub-layer, and wherein the first and the second material are different materials.

A method for manufacturing a plurality of mechanical resonators (100) in a manufacturing wafer (10), the resonators being intended to be fitted to an adjusting member of a timepiece, the method comprising the following steps: (a) manufacturing a plurality of resonators in at least one reference wafer according to reference specifications, such manufacture comprising at least one lithography step to form patterns of the resonators on or above the reference wafer and a step of machining in the reference plate using the patterns; (b) for the at least one reference plate, establishing a map indicative of the dispersion of stiffnesses of the resonators relative to an average stiffness value; (c) dividing the map into fields and determining a correction to be made to the dimensions of the resonators for at least one of the fields in order to reduce the dispersion; (d) modifying the reference specifications for the lithography step so as to make the corrections to the dimensions for the at least one field in the lithography step; (e) manufacturing resonators in a manufacturing wafer using the modified specifications.

A method includes depositing a passivation layer on a substrate; depositing and patterning a first polysilicon layer on the passivation layer; depositing and patterning a first oxide layer on the first polysilicon layer forming a patterned first oxide layer; depositing and patterning a second polysilicon layer on the patterned first oxide layer. A portion of the second polysilicon layer directly contacts a portion of the first polysilicon layer. A portion of the patterned second polysilicon layer corresponds to a bottom electrode. A second oxide layer is deposited on the patterned second polysilicon layer and on an exposed portion of the patterned first oxide layer. A portion of the second oxide layer corresponding to a sensing cavity is etched, exposing the bottom electrode. Another substrate is bonded to the second oxide layer enclosing the sensing cavity. A top electrode is disposed within the another substrate and positioned over the bottom electrode.