Patent classifications
B41J2/1642
Liquid ejection head and method for manufacturing liquid ejection head
A liquid ejection head includes a liquid ejection head substrate having ejection elements that generate liquid ejecting energy, an ejection port formation member having ejection ports, and liquid chambers between the liquid ejection head substrate and the ejection port formation member to house liquid to be ejected through the ejection ports. The liquid ejection head substrate includes a substrate, an insulating film stacked on the substrate to insulate the ejection elements, communication ports in the substrate and the insulating film to communicate with the liquid chambers, and a liquid-resistant insulating film adherent to the ejection port formation member. The liquid-resistant insulating film covers the insulating film at its ejection port formation member side and includes a first portion partially contacting the ejection port formation member and a second portion covering the inner surfaces of the communication ports in the insulating film, the first and second portions being continuous.
SUBSTRATE FOR LIQUID EJECTION HEAD AND LIQUID EJECTION HEAD
A substrate for liquid ejection head comprising, a base material, a heating element including a heating resistor layer for generating thermal energy for discharging a liquid, a wiring layer for supplying electric power to the heating element, and an interlayer insulating film for insulating the heating resistor layer and the wiring layer. A part of a first interlayer insulating film for insulating the heating resistor layer and a first wiring layer adjacent to the heating resistor layer, and a second interlayer insulating film for insulating the first wiring layer and a second wiring layer adjacent to the second interlayer insulating film, includes a material layer represented by Si.sub.wO.sub.xC.sub.yN.sub.z (w+x+y+z=100 (at. %), 37≤w≤60 (at. %), 30≤x≤53 (at. %), 6≤y≤−29 (at. %), 4≤z≤9 (at. %)).
LIQUID EJECTION HEAD SUBSTRATE AND LIQUID EJECTION HEAD
Long-term reliability of a liquid ejection head substrate and a liquid ejection head is improved by suppressing dissolution of an intermediate layer due to anodization. A liquid ejection head substrate including: a flow passage forming member having an ejection orifice and a flow passage; a heating resistance element for ejecting a liquid; an insulating layer covering the heating resistance element; a protecting layer whose surface is exposed to the flow passage; and an intermediate layer provided between the flow passage forming member and the protecting layer, in which the intermediate layer contains a material represented by a following composition formula (I): Si.sub.w1O.sub.x1C.sub.y1 (I), 39≤w1≤62 (at. %), 32≤x1≤55 (at. %), and 6≤y1≤29 (at. %), and w1+x1+y1=100 (at %).
INKJET PRINT HEAD AND MANUFACTURING METHOD THEREFOR
An inkjet printing head includes a piezoelectric element that includes a lower electrode disposed on a movable film, a piezoelectric film formed on the lower electrode, and an upper electrode formed on the piezoelectric film, a hydrogen barrier film that covers, in a front surface of the piezoelectric element, at least, entireties of side surfaces of the upper electrode, the piezoelectric film, and the lower electrode, at least a part of an upper surface of the upper electrode, and an upper surface of the lower electrode, a first interlayer insulating film formed on a front surface other than an end surface of the hydrogen barrier film, a second interlayer insulating film formed so as to cover the end surface of the hydrogen barrier film and the first interlayer insulating film, and a wiring that is formed on the second interlayer insulating film and that is connected to the piezoelectric element.
LIQUID EJECTION HEAD CIRCUIT BOARD AND LIQUID EJECTION HEAD
A liquid ejection head circuit board including a substrate, a heat generating resistance element that generates heat energy used for ejection of liquid, an electric wiring layer that is electrically connected to the heat generating resistance element, and an insulating film that insulates the electric wiring layer. The insulating film includes a first insulating film and a second insulating film on the first insulating film, the first insulating film is a first SiOCN film, and the second insulating film is a second SiOCN film containing more carbon than the first SiOCN film or a low-density insulating film with a lower density than the first SiOCN film.
Wafer structure
A wafer structure is disclosed and includes a chip substrate and a plurality of inkjet chips. The chip substrate is a silicon substrate fabricated by a semiconductor process. At least one inkjet chip is directly formed on the chip substrate by the semiconductor process and diced into the at least one inkjet chip for inkjet printing. Each of the inkjet chip includes a plurality of ink-drop generators produced by a semiconductor process and formed on the chip substrate. Each of the ink-drop generators includes a thermal-barrier layer, a resistance heating layer, a conductive layer, a protective layer, a barrier layer, an ink-supply chamber and a nozzle.
WAFER STRUCTURE
A wafer structure is disclosed and includes a chip substrate and at least one inkjet chip. The chip substrate is a silicon substrate which is fabricated by a semiconductor process on a wafer of at least 12 inches. The at least one inkjet chip is directly formed on the chip substrate by the semiconductor process, and the wafer is diced into the at least one inkjet chip, to be implemented for inkjet printing.
WAFER STRUCTURE
A wafer structure is disclosed and includes a chip substrate and a plurality of inkjet chips. The chip substrate is a silicon substrate which is fabricated by a semiconductor process on a wafer of at least 12 inches. The plurality of inkjet chips include at least one first inkjet chip and at least one second inkjet chip. The plurality of inkjet chips are directly formed on the chip substrate by the semiconductor process, respectively, and diced into the at least one first inkjet chip and the at least one second inkjet chip, to be implemented for inkjet printing. Each of the first inkjet chip and the second inkjet chip includes a plurality of ink-drop generators produced by the semiconductor process and formed on the chip substrate.
WAFER STRUCTURE
A wafer structure is disclosed and includes a chip substrate and a plurality of inkjet chips. The chip substrate is a silicon substrate which is fabricated by a semiconductor process. The plurality of inkjet chips include at least one first inkjet chip and at least one second inkjet chip. The plurality of inkjet chips are directly formed on the chip substrate by the semiconductor process, respectively, and diced into the at least one first inkjet chip and the at least one second inkjet chip, to be implemented for inkjet printing. Each of the first inkjet chip and the second inkjet chip includes a plurality of ink-drop generators produced by the semiconductor process and formed on the chip substrate. Each ink-drop generator includes a barrier layer, an ink-supply chamber and a nozzle. The ink-supply chamber and the nozzle are integrally formed in the barrier layer.
WAFER STRUCTURE
A wafer structure is disclosed and includes a chip substrate and at least one inkjet chip. The chip substrate is a silicon substrate fabricated by a semiconductor process. The inkjet chip is directly formed on the chip substrate by the semiconductor process, whereby the wafer structure is diced, and the inkjet chip is produced, to be implemented for inkjet printing. The inkjet chip includes a plurality of ink-drop generators produced by the semiconductor process and formed on the chip substrate. Each of the ink-drop generators includes a barrier layer, an ink-supply chamber and a nozzle, and the ink-supply chamber and the nozzle are integrally formed in the barrier layer.