B29L2031/7184

System and method for manufacturing a cosmetic stick

A method for manufacturing a cosmetic stick having at least two different colored portions includes inserting a pin into at least one mold cavity of a mold body, filling the mold cavity containing the pin with a first cosmetic material of a first color, and then recovering the excess first cosmetic material from a top surface of the mold body. The pin is removed from the mold cavity leaving a void in the mold cavity, and a guard plate is placed over the top surface of the mold body, the guard plate having a hole over the mold cavity. The void in the mold cavity is filled with a second cosmetic material, the second cosmetic material being a second color that is different than the first color. The excess second cosmetic material is then recovered from a top surface of the guard plate.

Hybrid tracking of transaction read and write sets

Embodiments of the invention relate to tracking processor transactional read and write sets, thereby eliminating speculative mispredictions. Both non-speculative read set and write set indications are maintained for a transaction. The indications are stored in cache. In addition, load and write queues of addresses are maintained. The load queue of addresses relates to speculative members of a read set and the write queue of addresses relates to speculating member of a write set. For a received read request, a transaction resolution process takes place, and a resolution is performed if an address match in the write queue is detected. Similarly, for a receive write request the transaction interference additionally checks the load queue and the non-speculative read set for the pending address.

COSMETIC LIP APPLICATOR
20210323205 · 2021-10-21 ·

A method of producing a cosmetic applicator via injection molding is described. In the method, a thermoplastic material is introduced into a mold cavity. The mold cavity comprises a surface which engages the thermoplastic material. The surface may provide micro-etched features recessed therein.

Hybrid tracking of transaction read and write sets

Tracking a processor instruction is provided to limit a speculative mis-prediction. A non-speculative read set indication and/or write set indication are maintained for a transaction. In addition, a queue(s) of at least one address corresponding to a speculatively executed instruction is maintained. For a received request from a remote processor, a transaction resolution process takes place, and a resolution is performed if an address match in the queue is detected. The resolution includes to hold a response to the receive request until the speculative instruction is committed or flushed.

System and method for manufacturing a cosmetic stick

A method for manufacturing a cosmetic stick having at least two different colored portions includes inserting a pin into at least one mold cavity of a mold body, filling the mold cavity containing the pin with a first cosmetic material of a first color, and then recovering the excess first cosmetic material from a top surface of the mold body. The pin is removed from the mold cavity leaving a void in the mold cavity, and a guard plate is placed over the top surface of the mold body, the guard plate having a hole over the mold cavity. The void in the mold cavity is filled with a second cosmetic material, the second cosmetic material being a second color that is different than the first color. The excess second cosmetic material is then recovered from a top surface of the guard plate.

Hybrid Tracking of Transaction Read and Write Sets

Tracking a processor instruction is provided to limit a speculative mis-prediction. A non-speculative read set indication and/or write set indication are maintained for a transaction. In addition, a queue(s) of at least one address corresponding to a speculatively executed instruction is maintained. For a received request from a remote processor, a transaction resolution process takes place, and a resolution is performed if an address match in the queue is detected. The resolution includes to hold a response to the receive request until the speculative instruction is committed or flushed.

Hybrid tracking of transaction read and write sets

Tracking a processor instruction is provided to limit a speculative mis-prediction. A non-speculative read set indication and/or write set indication are maintained for a transaction. In addition, a queue(s) of at least one address corresponding to a speculatively executed instruction is maintained. For a received request from a remote processor, a transaction resolution process takes place, and a resolution is performed if an address match in the queue is detected. The resolution includes to hold a response to the receive request until the speculative instruction is committed or flushed.

Hybrid Tracking of Transaction Read and Write Sets

Tracking a processor instruction is provided to limit a speculative mis-prediction. A non-speculative read set indication and/or write set indication are maintained for a transaction. In addition, a queue(s) of at least one address corresponding to a speculatively executed instruction is maintained. For a received request from a remote processor, a transaction resolution process takes place, and a resolution is performed if an address match in the queue is detected. The resolution includes to hold a response to the receive request until the speculative instruction is committed or flushed.

Hybrid tracking of transaction read and write sets

Embodiments of the invention relate to tracking processor transactional read and write sets, thereby eliminating speculative mispredictions. Both non-speculative read set and write set indications are maintained for a transaction. The indications are stored in cache. In addition, load and write queues of addresses are maintained. The load queue of addresses relates to speculative members of a read set and the write queue of addresses relates to speculating member of a write set. For a received read request, a transaction resolution process takes place, and a resolution is performed if an address match in the write queue is detected. Similarly, for a receive write request the transaction interference additionally checks the load queue and the non-speculative read set for the pending address.