A microelectromechanical structure, including a functional element situated in a cavity of the microelectromechanical structure. The functional element includes an aluminum nitride layer. The cavity is closed by a cap layer. The cap layer includes epitaxial silicon. A method for manufacturing a micromechanical structure is also described.

A process for exposing at least one region of a face, known as the front face, of an electronic device, the process including the following steps: A bonding step for a cover (600) to the front face, the bonding being undertaken such that the cover (600) forms a closed cavity (650) with the region, advantageously hermetically sealed ; Formation of an encapsulation coating (700), of thickness E1, covering the front face and the cover (600); A thinning step for the encapsulation coating (700), the thinning step including removal of a removal thickness E2, less than the thickness E1, of the encapsulation coating (700), the removal thickness E2 being adjusted such that an opening is formed in the cover (600).

A semiconductor component. The semiconductor component has a semiconductor substrate, an insulation layer, and a first monocrystalline silicon layer. The insulation layer is arranged on the semiconductor substrate, and the first monocrystalline silicon layer is arranged on the insulation layer and at least one first region that extends starting from the first monocrystalline silicon layer up to a surface of the semiconductor substrate. The at least one first region includes second monocrystalline silicon.

A device includes a complementary metal-oxide-semiconductor (CMOS) wafer and a conductive shielding layer. The CMOS wafer includes a semiconductor substrate, at least one front-end-of-the-line (FEOL) element, at least one back-end-of-the-line (BEOL) element and at least one dielectric layer. The FEOL element is disposed on the semiconductor substrate, the dielectric layer is disposed on the semiconductor substrate, and the BEOL element is disposed on the dielectric layer. The conductive shielding layer is disposed on the dielectric layer, in which the conductive shielding layer is electrically connected to the semiconductor substrate.

A device includes a complementary metal-oxide-semiconductor (CMOS) wafer and a conductive shielding layer. The CMOS wafer includes a semiconductor substrate, at least one front-end-of-the-line (FEOL) element, at least one back-end-of-the-line (BEOL) element and at least one dielectric layer. The FEOL element is disposed on the semiconductor substrate, the dielectric layer is disposed on the semiconductor substrate, and the BEOL element is disposed on the dielectric layer. The conductive shielding layer is disposed on the dielectric layer, in which the conductive shielding layer is electrically connected to the semiconductor substrate.

A micro-optical bench device is fabricated by a process that provides control over one or more properties of the micro-optical bench device and/or one or more properties of optical surfaces in the micro-optical bench device. The process includes etching a substrate to form a permanent structure including optical elements and a temporary structure. The shape of the temporary structure and gaps between the temporary structure and permanent structure facilitate control of a property of the micro-optical bench and/or optical surfaces therein. The process further includes removing the temporary structure from an optical path of the micro-optical bench device.

Integration of active devices with passive components and MEMS devices is disclosed. An integrated semiconductor structure includes an active device having a device top electrode connected to a conductive jumper by a device-side via/interconnect metal stack. The integrated semiconductor structure also includes a passive component having a component bottom plate connected to the conductive jumper by a component side via/interconnect metal stack. The component bottom plate is situated at an intermediate metal level higher than the device top electrode, and the conductive jumper is situated at a connecting metal level higher than the component bottom plate. The conductive jumper reduces undesirable charge flow into the active device during fabrication of the passive component. The passive component can be, for example, a MEMS device.

A method includes forming a front-end-of-the-line (FEOL) element over a substrate; forming a back-end-of-the-line (BEOL) element over the FEOL element; forming an interconnection structure over the substrate; forming a conductive shielding layer electrically connected to the interconnection structure and vertically overlapping the FEOL element and the BEOL element, wherein the conductive shielding layer is grounded to the substrate through the interconnection structure; and forming a dielectric layer covering the conductive shielding layer.