The present disclosure is directed to a method for manufacturing a micro-electro-mechanical device. The method includes the steps of forming, on a substrate, a first protection layer of crystallized aluminum oxide, impermeable to HF; forming, on the first protection layer, a sacrificial layer of silicon oxide removable with HF; forming, on the sacrificial layer, a second protection layer of crystallized aluminum oxide; exposing a sacrificial portion of the sacrificial layer; forming, on the sacrificial portion, a first membrane layer of a porous material, permeable to HF; forming a cavity by removing the sacrificial portion through the first membrane layer; and sealing pores of the first membrane layer by forming a second membrane layer on the first membrane layer.

Method for manufacturing a micro-electro-mechanical system, MEMS, integrating a first MEMS device and a second MEMS device. The first MEMS device is a capacitive pressure sensor and the second MEMS device is an inertial sensor. The steps of manufacturing the first and second MEMS devices are, at least partly, shared with each other, resulting in a high degree of integration on a single die, and allowing to implement a manufacturing process with high yield and controlled costs.

A method for fabricating calcite channels in a nanofluidic device is described. A porous membrane is attached to a substrate. Calcite is deposited in porous openings in the porous membrane attached to the substrate. A width of openings in the deposited calcite is in a range from 50 to 100 nanometers (nm). The porous membrane is etched to remove the porous membrane from the substrate to form a fabricated calcite channel structure. Each channel has a width in the range from 50 to 100 nm.

Various embodiments of the present disclosure are directed towards a method to roughen a crystalline layer. A crystalline layer is deposited over a substrate. A mask material is diffused into the crystalline layer along grain boundaries of the crystalline layer. The crystalline layer and the mask material may, for example, respectively be or comprise polysilicon and silicon oxide. Other suitable materials are, however, amenable. An etch is performed into the crystalline layer with an etchant having a high selectivity for the crystalline layer relative to the mask material. The mask material defines micro masks embedded in the crystalline layer along the grain boundaries. The micro masks protect underlying portions of the crystalline layer during the etch, such that the etch forms trenches in the crystalline layer where unmasked by the micro masks.

A multi-purpose Micro-Electro-Mechanical Systems (MEMS) thermopile sensor able to use as a thermal conductivity sensor, a Pirani vacuum sensor, a thermal flow sensor and a non-contact infrared temperature sensor, respectively. The sensor comprises a rectangular membrane created in a silicon substrate which has a thin polysilicon layer and a thin residual thermal reorganized porous silicon layer both attached on its back side, and configured to have its three sides clamped to the frame formed in the silicon substrate which surrounds and supports the membrane and the other side free to the frame, a cavity created in the silicon substrate, positioned under the membrane and having its flat bottom opposite to the membrane, its three side walls shaped as curved planes and the other side wall shaped as a vertical plane, a heater or an infrared absorber positioned on the membrane, close to and parallel with the free side of the membrane and a thermopile positioned on the membrane and consists of several thermocouples connected in series and having its hot junctions close to the heater and its cold junctions extended to the frame.

The invention provides an electronic device package and fabrication method thereof. The electronic device package includes a sensor chip. An upper surface of the sensor chip comprises a sensing film. A covering plate having an opening structure covers the upper surface of the sensor chip. A cavity is between the covering plate and the sensor chip, corresponding to a position of the sensing film, where the cavity communicates with the opening structure. A spacer is between the covering plate and the sensor chip, surrounding the cavity. A pressure releasing region is between the spacer and the sensing film.

A micromechanical pressure sensor device including a semiconductor base substrate of a first doping type on which an intermediate layer of the first doping type is situated, a cavity sealed by a sealing layer of a second doping type and including a reference pressure, a first grating of the second doping type, suspended inside the cavity on a buried connection region of the second doping type, the buried connection region laterally extending away from the cavity into the semiconductor base material, a second grating of the second doping type, situated on a side of the diaphragm region pointing to the cavity and suspended on the diaphragm region, the first grating and the second grating being electrically insulated from each other and forming a capacitance, a first connection electrically connected to the first grating via the buried connection region, and a second connection electrically connected to the second grating.

A semiconductor device includes: a substrate; a transduction microstructure integrated in the substrate; a cap joined to the substrate and having a first face adjacent to the substrate and a second, outer, face; and a channel extending through the cap from the second face to the first face and communicating with the transduction microstructure. A protective membrane made of porous polycrystalline silicon permeable to aeriform substances is set across the channel.

Various embodiments of the present disclosure are directed towards a method to roughen a crystalline layer. A crystalline layer is deposited over a substrate. A mask material is diffused into the crystalline layer along grain boundaries of the crystalline layer. The crystalline layer and the mask material may, for example, respectively be or comprise polysilicon and silicon oxide. Other suitable materials are, however, amenable. An etch is performed into the crystalline layer with an etchant having a high selectivity for the crystalline layer relative to the mask material. The mask material defines micro masks embedded in the crystalline layer along the grain boundaries. The micro masks protect underlying portions of the crystalline layer during the etch, such that the etch forms trenches in the crystalline layer where unmasked by the micro masks.

A method of producing a semiconductor device includes providing a carrier structure having a semiconductor substrate; applying or introducing a precursor substance onto or into the carrier structure, treating the precursor substance for producing a porous matrix structure; introducing a functionalization substance into the porous matrix structure.