A device includes a substrate comprising a first standoff, a second standoff, a third standoff, a first cavity, a second cavity, and a bonding material covering a portion of the first, the second, and the third standoff. The first cavity is positioned between the first and the second standoffs, and the second cavity is positioned between the second and the third standoffs. The first cavity comprises a first cavity region and a second cavity region separated by a portion of the substrate extruding thereto, and wherein a depth associated with the first cavity region is greater than a depth associated with the second cavity. A surface of the first cavity is covered with a getter material.

Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.

The present disclosure provides a packaging method, including: providing a first semiconductor substrate; forming a bonding region on the first semiconductor substrate, wherein the bonding region of the first semiconductor substrate includes a first bonding metal layer and a second bonding metal layer; providing a second semiconductor substrate having a bonding region, wherein the bonding region of the second semiconductor substrate includes a third bonding layer; and bonding the first semiconductor substrate to the second semiconductor substrate by bringing the bonding region of the first semiconductor substrate in contact with the bonding region of the second semiconductor substrate; wherein the first and third bonding metal layers include copper (Cu), and the second bonding metal layer includes Tin (Sn). An associated packaging structure is also disclosed.

An ultrasonic transducer includes a membrane, a bottom electrode, and a plurality of cavities disposed between the membrane and the bottom electrode, each of the plurality of cavities corresponding to an individual transducer cell. Portions of the bottom electrode corresponding to each individual transducer cell are electrically isolated from one another. Each portion of the bottom electrode corresponds to each individual transducer that cell further includes a first bottom electrode portion and a second bottom electrode portion, the first and second bottom electrode portions electrically isolated from one another.

A microchannel chip with which channel deformation does not occur even when high-temperature and high-pressure sterilization treatment is performed and with which strong joining performance of substrates is maintained; and a method for manufacturing the same are provided. A microchannel chip comprising: a channel substrate having a microchannel formed on at least one surface thereof; a lid substrate; and a joining layer joining the channel substrate and the lid substrate, wherein the channel substrate, the lid substrate, and the joining layer are each formed of a cycloolefin polymer, a glass-transition temperature Tg.sub.s1 of a cycloolefin polymer forming the channel substrate, a glass-transition temperature Tg.sub.s2 of a cycloolefin polymer forming the lid substrate, and a glass-transition temperature Tg.sub.2 of a cycloolefin polymer forming the joining layer have relationships: Tg.sub.s1>Tg.sub.2; and Tg.sub.s2>Tg.sub.2, and the joining layer has a thickness within a specific range.

Disclosed is a multi-silicon on insulator (SOI) micromachined ultrasonic transducer (MUT) device. The device comprises a multi-SOI substrate and a MUT. The MUT is affixed to a surface of the multi-SOI substrate. The multi-SOI substrate has a first SOI layer and at least a second SOI layer disposed above the first SOI layer. The first SOI layer and the second SOI layer each comprise an insulating layer and a semiconducting layer. The first SOI layer further defines a cavity located under a membrane of a MUT and one or more trenches at least partially around a perimeter of the cavity.

The present disclosure relates to a microelectromechanical systems (MEMS) apparatus. The MEMS apparatus includes a base substrate and a conductive routing layer disposed over the base substrate. A bump feature is disposed directly over the conductive routing layer. Opposing outermost sidewalls of the bump feature are laterally between outermost sidewalls of the conductive routing layer. A MEMS substrate is bonded to the base substrate and includes a MEMS device directly over the bump feature. An anti-stiction layer is arranged on one or more of the bump feature and the MEMS device.

A package for encapsulating a functional area against an environment includes a base substrate and a cover substrate, the base substrate together with the cover substrate defining at least part of the package or defining the package, and furthermore including the at least one functional area provided in the package, and a blocking way for reducing permeation between the environment and the functional area. The package may include at least one laser bonding line, and the substrates of the package can be hermetically joined to one another by the at least one laser bonding line, and the laser bonding line has a height (HL) perpendicular to its bonding plane.

An apparatus for sorting macromolecules includes a first chip including a channel formed in a first side of the first chip and having at least one monolithic sorting structure for sorting macromolecules from the sample fluid. A first set of vias formed in the first chip has openings in a second side of the first chip, the sample fluid being provided to the sorting structure through the first set of vias. A second set of vias formed in the first chip has openings in the second side for receiving macromolecules in the sample fluid greater than or equal to a prescribed dimension sorted by the sorting structure. A third set of vias formed in the first chip has openings in the second side for receiving macromolecules in the sample fluid less than the prescribed dimension. The apparatus includes first and second seals covering the first and second sides, respectively.

Methods for fabricating MEMS tuning fork gyroscope sensor system using silicon wafers. This provides the possibly to avoid glass. The sense plates can be formed in a device layer of a silicon on insulator (SOI) wafer or in a deposited polysilicon layer in a few examples.