Provided are package-on-package (POP)-type semiconductor packages including a lower package having a first size and including a lower package substrate in which a lower semiconductor chip is, an upper redistribution structure on the lower package substrate and the lower semiconductor chip, and alignment marks. The packages may also include an upper package having a second size smaller than the first size and including an upper package substrate and an upper semiconductor chip. The upper package substrate may be mounted on the upper redistribution structure of the lower package and electrically connected to the lower package, and the upper semiconductor chip may be on the upper package substrate. The alignment marks may be used for identifying the upper package, and the alignment marks may be below and near outer boundaries of the upper package on the lower package.

Provided are package-on-package (POP)-type semiconductor packages including a lower package having a first size and including a lower package substrate in which a lower semiconductor chip is, an upper redistribution structure on the lower package substrate and the lower semiconductor chip, and alignment marks. The packages may also include an upper package having a second size smaller than the first size and including an upper package substrate and an upper semiconductor chip. The upper package substrate may be mounted on the upper redistribution structure of the lower package and electrically connected to the lower package, and the upper semiconductor chip may be on the upper package substrate. The alignment marks may be used for identifying the upper package, and the alignment marks may be below and near outer boundaries of the upper package on the lower package.

A semiconductor device is provided. The semiconductor device includes: a plurality of alignment dies, each including a diced first base substrate and at least one alignment mark on the diced first base substrate; a second base substrate; and a bonding film on the second base substrate. An alignment die of the plurality of alignment dies are attached on the bonding film on an alignment region of the second base substrate for aligning the second base substrate.

To provide a plate with which, although the plate has a plurality of microchannels or a microchannel in which a plurality of branch channels are formed, when a sample flowing through a microchannel is observed by a microscope, it is possible to easily identify the position of the microchannel or the branch channel under observation without reducing the magnification of the microscope.

A plate having a microchannel therein includes an identification mark for identifying a position of the microchannel in a plane direction of the plate. When the microchannel includes a plurality of mutually independent microchannels, the identification mark is preferably formed for each microchannel. When the microchannel includes a source channel communicating with an injection port through which a sample is injected and a plurality of branch channels communicating with the source channel, the identification mark is preferably formed for each of the source channel and the branch channels.

An alignment mark, a semiconductor device, and fabrication methods of the alignment mark and the semiconductor device are provided. The method includes providing a first base substrate, and forming a plurality of alignment marks on the first base substrate. The method also includes dicing the first base substrate to form a plurality of alignment dies. Each alignment die includes a diced first base substrate and at least one alignment mark diced from the plurality of alignment marks on the diced first base substrate. In addition, the method includes providing a second base substrate for aligning, and forming a bonding film on the second base substrate. Further, the method includes attaching an alignment die of the plurality of alignment dies to the bonding film on an alignment region of the second base substrate using a die attach process.

Provided are package-on-package (POP)-type semiconductor packages including a lower package having a first size and including a lower package substrate in which a lower semiconductor chip is, an upper redistribution structure on the lower package substrate and the lower semiconductor chip, and alignment marks. The packages may also include an upper package having a second size smaller than the first size and including an upper package substrate and an upper semiconductor chip. The upper package substrate may be mounted on the upper redistribution structure of the lower package and electrically connected to the lower package, and the upper semiconductor chip may be on the upper package substrate. The alignment marks may be used for identifying the upper package, and the alignment marks may be below and near outer boundaries of the upper package on the lower package.

An alignment mark, a semiconductor device, and fabrication methods of the alignment mark and the semiconductor device are provided. The method includes providing a first base substrate, and forming a plurality of alignment marks on the first base substrate. The method also includes dicing the first base substrate to form a plurality of alignment dies. Each alignment die includes a diced first base substrate and at least one alignment mark diced from the plurality of alignment marks on the diced first base substrate. In addition, the method includes providing a second base substrate for aligning, and forming a bonding film on the second base substrate. Further, the method includes attaching an alignment die of the plurality of alignment dies to the bonding film on an alignment region of the second base substrate using a die attach process.

To provide a plate with which, although the plate has a plurality of microchannels or a microchannel in which a plurality of branch channels are formed, when a sample flowing through a microchannel is observed by a microscope, it is possible to easily identify the position of the microchannel or the branch channel under observation without reducing the magnification of the microscope. A plate having a microchannel therein includes an identification mark for identifying a position of the microchannel in a plane direction of the plate. When the microchannel includes a plurality of mutually independent microchannels, the identification mark is preferably formed for each microchannel. When the microchannel includes a source channel communicating with an injection port through which a sample is injected and a plurality of branch channels communicating with the source channel, the identification mark is preferably formed for each of the source channel and the branch channels.

A method of arranging a plurality of semiconductor structural elements on a carrier includes arranging at least some of the semiconductor structural elements in multiple groups G and at least one semiconductor structural element of a group G has a property E that determines the position of the respective group G of semiconductor structural elements on the carrier.

A method includes forming an alignment pattern over an insulating layer formed over a carrier. A die is mounted over the carrier and encapsulated. Connectors are formed and the structure is attached to a debond tape. The carrier is removed. A cutting device is aligned to a backside of the insulating layer using the alignment pattern. The first insulating layer and encapsulant are cut from the backside of the insulating layer. Another method includes scanning a backside of a packages structure for an alignment pattern in a first package area of the packages structure. A cutting device is aligned to a cut-line in a non-package area of the packages structure based on the alignment pattern and packages are singulated. An InFO package includes an insulating layer on the backside, the insulating layer having a laser marking thereon. The InFO package also includes an alignment pattern proximate to the insulating layer.