Patent classifications
C23C16/045
METHOD FOR MANUFACTURING SHALLOW TRENCH ISOLATION STRUCTURE, SHALLOW TRENCH ISOLATION STRUCTURE AND SEMICONDUCTOR STRUCTURE
A method for manufacturing a shallow trench isolation structure includes: providing a substrate and forming multiple first trenches in the substrate, in which a cross-sectional width of each first trench increases downward along a vertical direction; forming a continuous first isolation layer on a top of the substrate and inner sides of the multiple first trenches by a deposition process, in which parts of the first isolation layer located in the first trenches form second trenches, and in which a cross-sectional width of each second trench remains constant downward along the vertical direction; and forming a continuous second isolation layer on a surface of the first isolation layer by an ISSG process, in which parts of the second isolation layer located in the second trenches completely fill up the second trenches.
SEAM-FREE GAPFILL DEPOSITION
Exemplary methods of semiconductor processing may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. The methods may include depositing a silicon-containing layer on surfaces defining the processing region of the semiconductor processing chamber. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-containing material on a substrate disposed within the processing region of the semiconductor processing chamber.
SEAM REMOVAL IN HIGH ASPECT RATIO GAP-FILL
Exemplary methods of semiconductor processing may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-containing material on the substrate. The silicon-containing material may extend within the one or more recessed features along the substrate and a seam or void may be defined by the silicon-containing material within at least one of the one or more recessed features along the substrate. The methods may also include treating the silicon-containing material with a hydrogen-containing gas, such as plasma effluents of the hydrogen-containing gas, which may cause a size of the seam or void to be reduced.
Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process are disclosed. The methods may include: providing a substrate comprising a dielectric surface into a reaction chamber; depositing a nucleation film directly on the dielectric surface; and depositing a molybdenum metal film directly on the nucleation film, wherein depositing the molybdenum metal film includes: contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor; and contacting the substrate with a second vapor phase reactant comprising a reducing agent precursor. Semiconductor device structures including a molybdenum metal film disposed over a surface of a dielectric material with an intermediate nucleation film are also disclosed.
Sequential infiltration synthesis apparatus
The disclosure relates to a sequential infiltration synthesis apparatus comprising: a reaction chamber constructed and arranged to accommodate at least one substrate; a first precursor flow path to provide the first precursor to the reaction chamber when a first flow controller is activated; a second precursor flow path to provide a second precursor to the reaction chamber when a second flow controller is activated; a removal flow path to allow removal of gas from the reaction chamber; a removal flow controller to create a gas flow in the reaction chamber to the removal flow path when the removal flow controller is activated; and, a sequence controller operably connected to the first, second and removal flow controllers and the sequence controller being programmed to enable infiltration of an infiltrateable material provided on the substrate in the reaction chamber. The apparatus may be provided with a heating system.
Film-forming apparatus and film-forming method
A film-forming apparatus for forming a predetermined film on a substrate by plasma ALD includes a chamber, a stage, a shower head having an upper electrode and a shower plate insulated from the upper electrode, a first high-frequency power supply connected to the upper electrode, and a second high-frequency power supply connected to an electrode contained in the stage. A high-frequency power is supplied from the first high-frequency power supply to the upper electrode, thereby forming a high-frequency electric field between the upper electrode and the shower plate and generating a first capacitively coupled plasma. A high-frequency power is supplied from the second high-frequency power supply to the electrode, thereby forming a high-frequency electric field between the shower plate and the electrode in the stage and generating a second capacitively coupled plasma that is independent from the first capacitively coupled plasma.
Methods and apparatus for depositing materials on a continuous substrate
Methods and apparatus for depositing material on a continuous substrate are provided herein. In some embodiments, an apparatus for processing a continuous substrate includes: a first chamber having a first volume; a second chamber having a second volume fluidly coupled to the first volume; and a plurality of process chambers, each having a process volume defining a processing path between the first chamber and the second chamber, wherein the process volume of each process chamber is fluidly coupled to each other, to the first volume, and to the second volume, and wherein the first chamber, the second chamber, and the plurality of process chambers are configured to process a continuous substrate that extends from the first chamber, through the plurality of process chambers, and to the second chamber.
Low deposition rates for flowable PECVD
PECVD methods for depositing a film at a low deposition rate comprising intermittent activation of the plasma are disclosed. The flowable film can be deposited using at least a polysilane precursor and a plasma gas. The deposition rate of the disclosed processes may be less than 500 Å/min.
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
There is provided a technique that includes: etching a portion of a first film formed on a surface of a substrate by performing a cycle a predetermined number of times, the cycle including: supplying an etching gas into a process chamber while raising an internal pressure of the process chamber in a state in which the substrate having the first film formed on the surface of the substrate is accommodated in the process chamber; and lowering the internal pressure of the process chamber by exhausting an interior of the process chamber in a state in which supply of the etching gas into the process chamber is stopped.
SEMICONDUCTOR PROCESSING TOOL AND METHOD FOR PASSIVATION LAYER FORMATION AND REMOVAL
A semiconductor processing tool performs passivation layer deposition and removal in situ. A transport mechanism included in the semiconductor processing tool transfers a semiconductor structure through different deposition chambers (e.g., without breaking or removing a vacuum environment). Accordingly, the semiconductor processing tool deposits a target layer that is thinner on, or even absent from, a metal layer, such that contact resistance is reduced between a conductive structure formed over the target layer and the metal layer. As a result, electrical performance of a device including the conductive structure is improved. Moreover, because the process is performed in situ (e.g., without breaking or removing the vacuum) in the semiconductor processing tool, production time and risk of impurities in the conductive structure are reduced. As a result, throughput is increased, and chances of spoiled wafers are decreased.