An etcher comprises a bath, a plurality of blades, and a tunnel. The bath includes a first electrode at a first end and a second electrode at a second end. The plurality of blades is configured to fit in the bath. At least one blade of the plurality of blades holds a wafer. At least one tunnel is configured to fit between adjacent blades of the plurality of blades in the bath.

An etcher comprises a bath, a plurality of blades, and a tunnel. The bath includes a first electrode at a first end and a second electrode at a second end. The plurality of blades is configured to fit in the bath. At least one blade of the plurality of blades holds a wafer. At least one tunnel is configured to fit between adjacent blades of the plurality of blades in the bath.

A photovoltaic cell is proposed. The photovoltaic cell includes a substrate of semiconductor material, and a plurality of contact terminals each one arranged on a corresponding contact area of the substrate for collecting electric charges being generated in the substrate by the light. For at least one of the contact areas, the substrate includes at least one porous semiconductor region extending from the contact area into the substrate for anchoring the whole corresponding contact terminal on the substrate. In the solution according to an embodiment of the invention, each porous semiconductor region has a porosity decreasing moving away from the contact area inwards the substrate. An etching module and an electrolytic module for processing photovoltaic cells, a production line for producing photovoltaic cells, and a process for producing photovoltaic cells are also proposed.

Exemplary methods of coating a semiconductor component substrate may include submerging the semiconductor component substrate in an alkaline electrolyte. The alkaline electrolyte may include yttrium. The methods may include igniting a plasma at a surface of the semiconductor component substrate for a period of time less than or about 12 hours. The methods may include forming a yttrium-containing oxide on the semiconductor component substrate. A surface of the yttrium-containing oxide may be characterized by a yttrium incorporation of greater than or about 10 at. %.

A surface processing method for a SiC substrate includes the following processes or steps: anodizing a workpiece surface of the SiC substrate by passing a current having a current density of 15 mA/cm.sup.2 or more through the SiC substrate as an anode in the presence of an electrolyte; disposing a grinding wheel layer of a surface processing pad to the workpiece surface and selectively removing, with the grinding wheel layer, an oxide formed on the workpiece surface through anodization; and performing, simultaneously or sequentially, the anodization of the workpiece surface and the selective removal of the oxide formed on the workpiece surface with the grinding wheel layer.

A surface processing method for a SiC substrate includes the following processes or steps: anodizing a workpiece surface of the SiC substrate by passing a current having a current density of 15 mA/cm.sup.2 or more through the SiC substrate as an anode in the presence of an electrolyte; disposing a grinding wheel layer of a surface processing pad to the workpiece surface and selectively removing, with the grinding wheel layer, an oxide formed on the workpiece surface through anodization; and performing, simultaneously or sequentially, the anodization of the workpiece surface and the selective removal of the oxide formed on the workpiece surface with the grinding wheel layer.

An electrical device that includes: a metal barrier layer; an anodic porous oxide region on the metal barrier layer; a trench around the anodic porous oxide region reaching the metal barrier layer; a liner at least on a wall of the trench on a side of the anodic porous oxide region forming an electrical isolation barrier and having an opening onto the anodic porous oxide region; a hard mask arranged above the trenches and the liner having an opening onto the anodic porous oxide region. A corresponding manufacturing method is also disclosed.

An electrical device that includes: a metal barrier layer; an anodic porous oxide region on the metal barrier layer; a trench around the anodic porous oxide region reaching the metal barrier layer; a liner at least on a wall of the trench on a side of the anodic porous oxide region forming an electrical isolation barrier and having an opening onto the anodic porous oxide region; a hard mask arranged above the trenches and the liner having an opening onto the anodic porous oxide region. A corresponding manufacturing method is also disclosed.

An etcher comprises a bath, a plurality of blades, and a tunnel. The bath includes a first electrode at a first end and a second electrode at a second end. The plurality of blades is configured to fit in the bath. At least one blade of the plurality of blades holds a wafer. At least one tunnel is configured to fit between adjacent blades of the plurality of blades in the bath.

An etcher comprises a bath, a plurality of blades, and a tunnel. The bath includes a first electrode at a first end and a second electrode at a second end. The plurality of blades is configured to fit in the bath. At least one blade of the plurality of blades holds a wafer. At least one tunnel is configured to fit between adjacent blades of the plurality of blades in the bath.