A method of producing an epitaxial silicon wafer, including: loading a wafer into a chamber; performing epitaxial growth; unloading the epitaxial silicon wafer from the chamber; and then cleaning the inside of the chamber using hydrochloric gas. After the cleaning is performed, whether components provided in the chamber are to be replaced or not is determined based on the cumulative amount of the hydrochloric gas supplied. The components have a base material that includes graphite and is coated with a silicon carbide film.

A method of manufacture and resulting structure for a single crystal electronic device with an enhanced strain interface region. The method of manufacture can include forming a nucleation layer overlying a substrate and forming a first and second single crystal layer overlying the nucleation layer. This first and second layers can be doped by introducing one or more impurity species to form a strained single crystal layers. The first and second strained layers can be aligned along the same crystallographic direction to form a strained single crystal bi-layer having an enhanced strain interface region. Using this enhanced single crystal bi-layer to form active or passive devices results in improved physical characteristics, such as enhanced photon velocity or improved density charges.

According to one embodiment, a scintillator includes a first layer provided on a surface of a substrate and including thallium activated cesium iodide; and a second layer provided on the first layer and including thallium activated cesium iodide. The second layer includes crystals having a [100] orientation partially diverted from a direction perpendicular to the surface of the substrate. Half width at half maximum of a frequency distribution curve of an angle between the direction perpendicular to the surface of the substrate and the [001] orientation, which is obtained by measuring the angle using EBSD method, is 2.4 degree or less.

A semiconductor wafer of single-crystal silicon has an oxygen concentration per new ASTM of not less than 5.0×10.sup.17 atoms/cm.sup.3 and not more than 6.5×10.sup.17 atoms/cm.sup.3; a nitrogen concentration per new ASTM of not less than 1.0×10.sup.13 atoms/cm.sup.3 and not more than 1.0×10.sup.14 atoms/cm.sup.3; a front side having a silicon epitaxial layer wherein the semiconductor wafer has BMDs whose mean size is not more than 10 nm determined by transmission electron microscopy and whose mean density adjacent to the epitaxial layer is not less than 1.0×10.sup.11 cm.sup.−3, determined by reactive ion etching after having subjected the wafer covered with the epitaxial layer to a heat treatment at a temperature of 780° C. for a period of 3 h and to a heat treatment at a temperature of 600° C. for a period of 10 h.

A silicon carbide crystal includes a seed layer, a bulk layer, and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer, and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.

A silicon carbide crystal includes a seed layer, a bulk layer, and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer, and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.

A method for manufacturing an epitaxial substrate includes the steps of: epitaxially growing a group III nitride semiconductor layer on a substrate; removing the substrate from a growth furnace; irradiating a surface of the group III nitride semiconductor layer with ultraviolet light while exposing the surface to an atmosphere containing oxygen; and measuring a sheet resistance value of the group III nitride semiconductor layer.

A method for manufacturing an epitaxial substrate includes the steps of: epitaxially growing a group III nitride semiconductor layer on a substrate; removing the substrate from a growth furnace; irradiating a surface of the group III nitride semiconductor layer with ultraviolet light while exposing the surface to an atmosphere containing oxygen; and measuring a sheet resistance value of the group III nitride semiconductor layer.

A quality evaluation method has a step of producing a silicon for evaluation in which a single crystal silicon is grown to extend radially from a core wire 9 while polycrystalline silicon is grown in a reactor 20; and a step of performing an evaluation using the single crystal silicon.

A quality evaluation method has a step of producing a silicon for evaluation in which a single crystal silicon is grown to extend radially from a core wire 9 while polycrystalline silicon is grown in a reactor 20; and a step of performing an evaluation using the single crystal silicon.