Patent classifications
C30B33/10
Rocking type seed crystal surface corrosion, cleaning and drying device and process method
A rocking type seed crystal surface corrosion, cleaning and drying device and a process method belong to the technical field of semiconductor crystal growth, comprising a corrosion tank and a matched corrosion tank cover, a seed crystal support platform arranged at a middle position of the bottom of the corrosion tank, and a high-purity hot nitrogen introduction short straight pipe, an corrosive liquid introduction short straight pipe, a deionized water introduction short straight pipe and an overflow liquid discharge short straight pipe matched with and arranged at both sides of the corrosion tank, wherein free ends of the high-purity hot nitrogen introduction short straight pipe, the corrosive liquid introduction short straight pipe and the deionized water introduction short straight pipe are all provided with switch stop valves; the device further comprises a rocking mechanism provided at the bottom of the corrosion tank; and the seed crystal support platform comprises a support frame symmetrically distributed on both sides of the vertical central axis of the corrosion tank and positioned at the bottom of the corrosion tank, a seed crystal support wheel mounted on an upper end of the support frame via a rotating shaft, and a matched seed crystal support wheel limiting mechanism. Adequate corrosion can be performed on the entire seed crystal surface, and the cleaning and drying processes of the seed crystal in the subsequent process can be combined organically to avoid secondary contamination of the seed crystal in the subsequent process.
Rocking type seed crystal surface corrosion, cleaning and drying device and process method
A rocking type seed crystal surface corrosion, cleaning and drying device and a process method belong to the technical field of semiconductor crystal growth, comprising a corrosion tank and a matched corrosion tank cover, a seed crystal support platform arranged at a middle position of the bottom of the corrosion tank, and a high-purity hot nitrogen introduction short straight pipe, an corrosive liquid introduction short straight pipe, a deionized water introduction short straight pipe and an overflow liquid discharge short straight pipe matched with and arranged at both sides of the corrosion tank, wherein free ends of the high-purity hot nitrogen introduction short straight pipe, the corrosive liquid introduction short straight pipe and the deionized water introduction short straight pipe are all provided with switch stop valves; the device further comprises a rocking mechanism provided at the bottom of the corrosion tank; and the seed crystal support platform comprises a support frame symmetrically distributed on both sides of the vertical central axis of the corrosion tank and positioned at the bottom of the corrosion tank, a seed crystal support wheel mounted on an upper end of the support frame via a rotating shaft, and a matched seed crystal support wheel limiting mechanism. Adequate corrosion can be performed on the entire seed crystal surface, and the cleaning and drying processes of the seed crystal in the subsequent process can be combined organically to avoid secondary contamination of the seed crystal in the subsequent process.
SILICON SINGLE CRYSTAL SUBSTRATE FOR VAPOR PHASE GROWTH, VAPOR PHASE GROWTH SUBSTRATE AND METHODS FOR PRODUCING THEM
A silicon single crystal substrate for vapor phase growth, having the silicon single crystal substrate being made of an FZ crystal having a resistivity of 1000 Ωcm or more, wherein the surface of the silicon single crystal substrate is provided with a high nitrogen concentration layer having a nitrogen concentration higher than that of other regions and a nitrogen concentration of 5×10.sup.15 atoms/cm.sup.3 or more and a thickness of 10 to 100 μm.
Stents having a hybrid pattern and methods of manufacture
An intravascular stent and method of making an intervascular stent having a hybrid pattern a. The hybrid pattern comprises a plurality of circumferentially self-expansible members comprising a plurality of interconnected, geometrically deformable closed cells, adjacent self-expansible members interconnected by a plurality of bridge members linking a first interconnection between two closed cells in a first self-expansible member to a second interconnection between two closed cells in a second self-expansible member, wherein the second interconnection is circumferentially offset and non-adjacent to the first interconnection.
Stents having a hybrid pattern and methods of manufacture
An intravascular stent and method of making an intervascular stent having a hybrid pattern a. The hybrid pattern comprises a plurality of circumferentially self-expansible members comprising a plurality of interconnected, geometrically deformable closed cells, adjacent self-expansible members interconnected by a plurality of bridge members linking a first interconnection between two closed cells in a first self-expansible member to a second interconnection between two closed cells in a second self-expansible member, wherein the second interconnection is circumferentially offset and non-adjacent to the first interconnection.
Group III nitride substrate, method of making, and method of use
Embodiments of the present disclosure include techniques related to techniques for processing materials for manufacture of group-III metal nitride and gallium based substrates. More specifically, embodiments of the disclosure include techniques for growing large area substrates using a combination of processing techniques. Merely by way of example, the disclosure can be applied to growing crystals of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others for manufacture of bulk or patterned substrates. Such bulk or patterned substrates can be used for a variety of applications including optoelectronic and electronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photodetectors, integrated circuits, and transistors, and others.
Group III nitride substrate, method of making, and method of use
Embodiments of the present disclosure include techniques related to techniques for processing materials for manufacture of group-III metal nitride and gallium based substrates. More specifically, embodiments of the disclosure include techniques for growing large area substrates using a combination of processing techniques. Merely by way of example, the disclosure can be applied to growing crystals of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others for manufacture of bulk or patterned substrates. Such bulk or patterned substrates can be used for a variety of applications including optoelectronic and electronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photodetectors, integrated circuits, and transistors, and others.
LOW ETCH PIT DENSITY, LOW SLIP LINE DENSITY, AND LOW STRAIN INDIUM PHOSPHIDE
Methods and wafers for low etch pit density, low slip line density, and low strain indium phosphide are disclosed and may include an indium phosphide single crystal wafer having a diameter of 4 inches or greater, having a measured etch pit density of less than 500 cm.sup.−2, and having fewer than 5 dislocations or slip lines as measured by x-ray diffraction imaging. The wafer may have a measured etch pit density of 200 cm.sup.−2 or less, or 100 cm.sup.−2 or less, or 10 cm.sup.−2 or less. The wafer may have a diameter of 6 inches or greater. An area of the wafer with a measured etch pit density of zero may at least 80% of the total area of the surface. An area of the wafer with a measured etch pit density of zero may be at least 90% of the total area of the surface.
LOW ETCH PIT DENSITY, LOW SLIP LINE DENSITY, AND LOW STRAIN INDIUM PHOSPHIDE
Methods and wafers for low etch pit density, low slip line density, and low strain indium phosphide are disclosed and may include an indium phosphide single crystal wafer having a diameter of 4 inches or greater, having a measured etch pit density of less than 500 cm.sup.−2, and having fewer than 5 dislocations or slip lines as measured by x-ray diffraction imaging. The wafer may have a measured etch pit density of 200 cm.sup.−2 or less, or 100 cm.sup.−2 or less, or 10 cm.sup.−2 or less. The wafer may have a diameter of 6 inches or greater. An area of the wafer with a measured etch pit density of zero may at least 80% of the total area of the surface. An area of the wafer with a measured etch pit density of zero may be at least 90% of the total area of the surface.
METHOD FOR MANUFACTURING SILICON SINGLE-CRYSTAL SUBSTRATE AND SILICON SINGLE-CRYSTAL SUBSTRATE
A method for manufacturing a silicon single-crystal substrate having a carbon diffusion layer on a surface, proximity gettering ability, and high strength near the surface, and hardly generating dislocation or extending dislocation, includes: a step of adhering carbon on a surface of a silicon single-crystal substrate by an RTA treatment of the silicon single-crystal substrate in a carbon-containing gas atmosphere; a step of forming a 3C-SiC single-crystal film on the surface of the silicon single-crystal substrate by reacting the carbon and the silicon single-crystal substrate; a step of oxidizing the 3C-SiC single-crystal film to be an oxide film and diffusing carbon inward the silicon single-crystal substrate by an RTA treatment of the silicon single-crystal substrate on which the 3C-SiC single-crystal film is formed, the RTA treatment being performed in an oxidative atmosphere; and a step of removing the oxide film.