G01R13/225

LINEAR NOISE REDUCTION FOR A TEST AND MEASUREMENT SYSTEM
20170292977 · 2017-10-12 ·

Disclosed is a mechanism for reducing noise caused by an analog to digital conversion in a test and measurement system. An adaptive linear filter is generated based on a converted digital signal and measured signal noise. The adaptive linear filter includes a randomness suppression factor for alleviating statistical errors caused by a comparison of a signal circularity coefficient and a noise circularity coefficient in the adaptive linear filter. The adaptive linear filter is applied to the digital signal along with a stomp filter and a suppression clamp filter. The digital signal may be displayed in a complex frequency domain along with depictions of the adaptive linear filter frequency response and corresponding circularity coefficients. The display may be animated to allow a user to view the signal and/or filters in the frequency domain at different times.

INSTRUMENT FOR ANALYZING AN INPUT SIGNAL

The present disclosure relates to an instrument for analyzing an input signal. The instrument comprises an input for receiving an input signal, a processing circuit or module for analyzing the input signal received, a display, such as a display module, for displaying information concerning the input signal analyzed, and a user input module for receiving instructions from a user. The instrument provides several functionalities, the several functionalities each being associated with at least one respective complexity. The instrument is set by the instructions of the user via the user input to analyze the input signal. The processing module evaluates a complexity of the instructions of the user.

User interface for a testing device configured to guide user testing of a motor drive and a motor

A testing device configured to operate as a dedicated tool for testing motor drives and motor shafts guides a user (such as a test engineer or a technician) through the steps of testing the motor drive and shaft. The testing device is configured to output testing results to the user. By configuring the testing device to output specific motor drive and shaft measurement results and by guiding a user through the steps of performing the measurement, operation of the testing device is simplified.

Measuring system as well as method for analyzing an analog signal
10620264 · 2020-04-14 · ·

A measuring system has an analog-to-digital converter, an acquisition memory, a processing unit, and a display memory. The processing unit is adapted to decode a digital signal according to a protocol creating a decoded signal and to evaluate the decoded signal at a cursor position. The digital data generated by decoding the decoded signal at the cursor position is stored in the display memory. Further, a method for analyzing an analog signal according to a protocol is shown.

USER INTERFACE FOR A TESTING DEVICE CONFIGURED TO GUIDE USER TESTING OF A MOTOR DRIVE AND A MOTOR
20190376999 · 2019-12-12 ·

A testing device configured to operate as a dedicated tool for testing motor drives and motor shafts guides a user (such as a test engineer or a technician) through the steps of testing the motor drive and shaft. The testing device is configured to output testing results to the user. By configuring the testing device to output specific motor drive and shaft measurement results and by guiding a user through the steps of performing the measurement, operation of the testing device is simplified.

MEASURING SYSTEM AS WELL AS METHOD FOR ANALYZING AN ANALOG SIGNAL
20180335474 · 2018-11-22 · ·

A measuring system has an analog-to-digital converter, an acquisition memory, a processing unit, and a display memory. The processing unit is adapted to decode a digital signal according to a protocol creating a decoded signal and to evaluate the decoded signal at a cursor position. The digital data generated by decoding the decoded signal at the cursor position is stored in the display memory. Further, a method for analyzing an analog signal according to a protocol is shown.

Matching circuit for matching an impedance value and a corresponding system and method
09952256 · 2018-04-24 · ·

The invention relates to a matching circuit for matching impedance values comprising an impedance element with an impedance value, which corresponds to a required total impedance value of the matching circuit, a structurally determined parasitic unit with a parasitic impedance value and a compensation unit with at least one first compensation element. The first compensation element provides a compensation impedance value which is the dual impedance value of the parasitic impedance value. Furthermore, a system comprising a first circuit unit and a second circuit unit with a matching circuit serving for the matching is provided. Also, a method for the compensation of parasitic units for matching purposes is provided.

Band overlay separator
09933458 · 2018-04-03 · ·

A test and measurement instrument including a splitter configured to split an input signal into at least two split signals, at least two harmonic mixers configured to mix an associated split signal with an associated harmonic signal to generate an associated mixed signal, at least two digitizers configured to digitize the associated mixed signal, at least two MIMO polyphase filter arrays configured to filter the associated digitized mixed signal of an associated digitizer of the at least two digitizers, at least two pairs of band separation filters configured to receive the associated digitized mixed signals from each of the MIMO polyphase filter arrays and output a low band of the input signal and a high band of the input signal based on a time different between the at least two digitizers and a phase drift of a local oscillator, and a combiner configured to combine the low band of the input signal and the high band of the input signal to form a reconstructed input signal.

SYSTEM AND METHOD FOR IMPROVED SIGNAL TRIGGERING IN SPECTRUM ANALYZERS
20250244363 · 2025-07-31 ·

A spectrum analyzer triggering system includes a frequency select trigger (FST) configured to generate a power signal from an input digital signal, the input power signal including high or low transitions at given transmission intervals of the input digital signal. The triggering system further includes a hysteresis comparator configured to generate a trigger pulse at the high or low transitions of the input power signal, and a leaky peak detector (LPD) configured to inhibit errant high or low transitions of the input power signal from causing the hysteresis comparator to generate a trigger pulse.