A semiconductor-based stress sensor can include a bipolar transistor device with first and second collector terminals. An excitation circuit can provide an excitation signal to an emitter terminal of the bipolar transistor device, and a physical stress indicator for the semiconductor can be provided based on a relationship between signals measured at the collector terminals in response to the excitation signal. The signals can indicate a charge carrier mobility characteristic of the semiconductor, which can be used to provide an indication of physical stress. In an example, the physical stress indicator is based on a current deflection characteristic of a base region of the transistor device.

A semiconductor-based stress sensor can include a bipolar transistor device with first and second collector terminals. An excitation circuit can provide an excitation signal to an emitter terminal of the bipolar transistor device, and a physical stress indicator for the semiconductor can be provided based on a relationship between signals measured at the collector terminals in response to the excitation signal. The signals can indicate a charge carrier mobility characteristic of the semiconductor, which can be used to provide an indication of physical stress. In an example, the physical stress indicator is based on a current deflection characteristic of a base region of the transistor device.

Provided herein are approaches for determining a status of a fuse or relay. In some embodiments, a system may include a first fuse or relay connected between a first input and a first output, and an optocoupler electrically connected with the first fuse or relay, wherein the optocoupler is operable to monitor a differential voltage of the first input or the first output. The system may further include an input/output (IO) expander receiving a status signal representing a state of the first fuse or relay, wherein only a single input port of the IO expander receives the status signal representing the state of the first fuse or relay.

Provided herein are approaches for determining a status of a fuse or relay. In some embodiments, a system may include a first fuse or relay connected between a first input and a first output, and an optocoupler electrically connected with the first fuse or relay, wherein the optocoupler is operable to monitor a differential voltage of the first input or the first output. The system may further include an input/output (IO) expander receiving a status signal representing a state of the first fuse or relay, wherein only a single input port of the IO expander receives the status signal representing the state of the first fuse or relay.

A method of detecting self-clearing, sub-cycle faults comprises sensing a current condition and a voltage condition at a location along a power cable. The sensed conditions are relayed to an analyzing device, the analyzing device including a current peak detector. The presence of a measured current value is determined. If the measured current value is greater than a current threshold value, a faulted circuit indicator (FCI) analysis is performed to determine the presence or absence of an FCI fault. If an FCI fault is absent, an incipient fault analysis is performed, wherein the RMS current values before and after a threshold event are compared and the voltage total harmonic distortion (THD) before and after the event are compared. If the two current values are within a first predetermined percentage and the THD values differ by a second predetermined percentage, then an incipient fault is reported. If either the two current values are not within the first predetermined percentage or the THD values do not differ by at least the second predetermined percentage,

A method of detecting self-clearing, sub-cycle faults comprises sensing a current condition and a voltage condition at a location along a power cable. The sensed conditions are relayed to an analyzing device, the analyzing device including a current peak detector. The presence of a measured current value is determined. If the measured current value is greater than a current threshold value, a faulted circuit indicator (FCI) analysis is performed to determine the presence or absence of an FCI fault. If an FCI fault is absent, an incipient fault analysis is performed, wherein the RMS current values before and after a threshold event are compared and the voltage total harmonic distortion (THD) before and after the event are compared. If the two current values are within a first predetermined percentage and the THD values differ by a second predetermined percentage, then an incipient fault is reported. If either the two current values are not within the first predetermined percentage or the THD values do not differ by at least the second predetermined percentage,

A battery voltage measurement circuit includes: a first switch configured to be connected to a positive electrode of a battery; a second switch configured to be connected to a negative electrode of the battery; detection resistances that are connected in series between the first switch and the second switch; capacitors that are connected in parallel to the detection resistances; and a measurement circuit that measures a voltage applied to the detection resistances. The battery voltage measurement circuit has a plurality of measurement modes depending upon status of the first and second switches, and further has a failure detection mode for the capacitors based on a change in the voltage after switching from one to an other of the measurement modes.

A battery voltage measurement circuit includes: a first switch configured to be connected to a positive electrode of a battery; a second switch configured to be connected to a negative electrode of the battery; detection resistances that are connected in series between the first switch and the second switch; capacitors that are connected in parallel to the detection resistances; and a measurement circuit that measures a voltage applied to the detection resistances. The battery voltage measurement circuit has a plurality of measurement modes depending upon status of the first and second switches, and further has a failure detection mode for the capacitors based on a change in the voltage after switching from one to an other of the measurement modes.

In an example, a system includes a first power stage including a first power field effect transistor (FET) and a first sense transistor coupled to the first power FET. The system also includes a second power stage including a second power FET and a second sense transistor coupled to the second power FET, where the second power stage is smaller than the first power stage. The system includes a first switch coupled to a gate and a drain of the first power FET and a second switch coupled to the first power stage and the second power stage. The system also includes a sense amplifier coupled to the second switch, where the first power stage, the second power stage, and the sense amplifier are coupled to a load terminal.

In an example, a system includes a first power stage including a first power field effect transistor (FET) and a first sense transistor coupled to the first power FET. The system also includes a second power stage including a second power FET and a second sense transistor coupled to the second power FET, where the second power stage is smaller than the first power stage. The system includes a first switch coupled to a gate and a drain of the first power FET and a second switch coupled to the first power stage and the second power stage. The system also includes a sense amplifier coupled to the second switch, where the first power stage, the second power stage, and the sense amplifier are coupled to a load terminal.