A system frequency detector includes an orthogonal coordinate signal generator generating an orthogonal two-phase voltage signal from a three-phase voltage signal of three-phase alternating current power by converting the three-phase voltage signal into a two-phase voltage signal orthogonal to the three-phase voltage signal, converting the two-phase voltage signal into a voltage signal of a rotating coordinate system, calculating a moving average of the voltage signal of the rotating coordinate system, and performing an inverse transformation of the voltage signal of the rotating coordinate system after calculating the moving average. A frequency calculator calculates an angular frequency based on the two-phase voltage signal, and an arithmetic unit calculates a system frequency of the power system from the angular frequency. The frequency calculator includes a rate limiter in series with the arithmetic unit, the rate limiter limiting a change of the system frequency equal to or greater than a prescribed change rate.

A semiconductor device includes a clock generator which receives an input clock and generates an output clock, a reference voltage generator which receives the input clock or the output clock, generates a sub-reference voltage in accordance with a frequency of the input clock or a frequency of the output clock, and generates a reference voltage using the sub-reference voltage and a preset error voltage, and a clock detector which receives the output clock, generates a first output voltage in accordance with the output clock, and compares the generated first output voltage with the reference voltage to output an error signal based on the output clock, wherein the preset error voltage is set in accordance with a degree of preset error of the output clock.

A semiconductor device includes a clock generator which receives an input clock and generates an output clock, a reference voltage generator which receives the input clock or the output clock, generates a sub-reference voltage in accordance with a frequency of the input clock or a frequency of the output clock, and generates a reference voltage using the sub-reference voltage and a preset error voltage, and a clock detector which receives the output clock, generates a first output voltage in accordance with the output clock, and compares the generated first output voltage with the reference voltage to output an error signal based on the output clock, wherein the preset error voltage is set in accordance with a degree of preset error of the output clock.

A circuit and method are provided to monitor a clock for a data processor. The method includes receiving a clock signal and producing a first voltage proportional to a frequency of the clock signal. The first voltage is converted to a digital signal. During an initialization mode, the method ensures the clock signal is at a desired frequency and scales the digital signal using a first configurable ratio to produce a high threshold value. When changing from the initialization mode to an operating mode, the method ceases to scale the digital signal and maintains the high threshold value. During the operating mode, the method compares the digital signal to the high threshold value to determine if the clock signal has been increased in frequency beyond a desired level, and if so, triggers an overclock alert to a system management circuit of the data processor.

A circuit and method are provided to monitor a clock for a data processor. The method includes receiving a clock signal and producing a first voltage proportional to a frequency of the clock signal. The first voltage is converted to a digital signal. During an initialization mode, the method ensures the clock signal is at a desired frequency and scales the digital signal using a first configurable ratio to produce a high threshold value. When changing from the initialization mode to an operating mode, the method ceases to scale the digital signal and maintains the high threshold value. During the operating mode, the method compares the digital signal to the high threshold value to determine if the clock signal has been increased in frequency beyond a desired level, and if so, triggers an overclock alert to a system management circuit of the data processor.

Systems and methods for estimating the state of health (SOH) of a battery are provided. The system includes a database, a parameter processing module, and an SOH estimation module. The database stores current and voltage data measured at a specific sampling rate during battery charging. The parameter processing module obtains response functions in the frequency domain, differential capacity, and differential voltage based on the stored current and voltage data and uses them to obtain parameters for SOH estimation. The SOH estimation module uses some or all the obtained parameters to estimate the SOH.

A method for providing a frequency of an electrical quantity in an electrical power system comprises obtaining (30), with respect to a first time, a first discrete Fourier transform, DFT, phasor of an electrical quantity in the electrical power system, estimating (32) a second DFT phasor at a time interval before the first time, where the time interval depends on an approximated frequency, and determining (34) the frequency at the first time based on the first and the second DFT phasor.

A method for providing a frequency of an electrical quantity in an electrical power system comprises obtaining (30), with respect to a first time, a first discrete Fourier transform, DFT, phasor of an electrical quantity in the electrical power system, estimating (32) a second DFT phasor at a time interval before the first time, where the time interval depends on an approximated frequency, and determining (34) the frequency at the first time based on the first and the second DFT phasor.

A power conversion device of an embodiment includes a rectifier that full-wave rectifies alternating current of a plurality of phases supplied from a power supply side, a capacitor that smoothes an output voltage of the rectifier, a voltage detection unit that detects the smoothed voltage, and an open phase detection unit that detects that an open phase has occurred in the alternating current of the plurality of phases based on a component having a frequency that is twice as high as a fundamental frequency of the alternating current of the plurality of phases included in frequency components of the smoothed voltage.

A power conversion device of an embodiment includes a rectifier that full-wave rectifies alternating current of a plurality of phases supplied from a power supply side, a capacitor that smoothes an output voltage of the rectifier, a voltage detection unit that detects the smoothed voltage, and an open phase detection unit that detects that an open phase has occurred in the alternating current of the plurality of phases based on a component having a frequency that is twice as high as a fundamental frequency of the alternating current of the plurality of phases included in frequency components of the smoothed voltage.