A shielding box for testing a transmission antenna and a reception antenna includes a first box, a second box, a third box, and an absorption material. The transmission antenna is positioned in the first box. The reception antenna is positioned in the third box. The absorption material is distributed over the inner surfaces of the first box, the second box, and the third box, respectively. The third box is connected through the second box to the first box. The second box provides a relatively narrow connection path for reducing the multipath interference between the transmission antenna and the reception antenna.

Examples of thermal contact devices and methods are shown. Compliant thermal contact devices are shown that include interleaved conducting structures to provide a high thermal conduction contact area. Selected examples include a thermal interface material located at the interleaved interface between the conducting structures. Selected examples also include designs for alternate chip orientations.

A semiconductor manufacturing device has an upper cover configured to be arranged above top surface of unshielded semiconductor device which are mounted on a tray placed on a carrier to go through electromagnetic shielding, and a displacement detector configured to detect an abnormality when the upper cover is raised by at least one of the semiconductor device which is brought into contact with a bottom surface of the upper cover.

Shielded probe systems are disclosed herein. The shielded probe systems are configured to test a device under test (DUT) and include an enclosure that defines an enclosure volume, a translation stage with a stage surface, a substrate-supporting stack extending from the stage surface, an electrically conductive shielding structure, an isolation structure, and a thermal shielding structure. The substrate-supporting stack includes an electrically conductive support surface and a temperature-controlled chuck. The electrically conductive shielding structure defines a shielded volume. The isolation structure electrically isolates the electrically conductive shielding structure from the enclosure and from the translation stage. The thermal shielding structure extends within the enclosure volume and at least partially between the enclosure and the substrate-supporting stack.

Methods for accelerated soiling testing of PV modules is described herein. The methods accurately reproduce soiling characteristics across various environmental conditions and can be performed in a laboratory environment under short testing times. A method described herein comprises the steps of forming a soiling mixture, depositing the soiling mixture on a surface portion of a PV module, exposing the PV module surface portion to simulated environmental conditions and determining an extent of recovery of the PV module surface portion.

Methods and apparatus for providing measurements in p-n junctions and taking into account the lateral current for improved accuracy are disclosed. The lateral current may be controlled, allowing the spreading of the current to be reduced or substantially eliminated. Alternatively or additionally, the lateral current may be measured, allowing a more accurate normal current to be calculated by compensating for the measured spreading. In addition, the techniques utilized for controlling the lateral current and the techniques utilized for measuring the lateral current may also be implemented jointly.

To provide a sensor device which is capable of high temperature detection using self-heat generation without providing a dedicated terminal and suppresses an increase in cost with an increase in chip occupation area due to the addition of a test pad. A sensor device is configured to include an active logic switching circuit for switching an active logic of an output driver and perform a heating inspection while switching the active logic of the output driver during an inspection process with the output driver as a heat generation source.

A solution for testing a set of one or more electronic device (105) is disclosed. A corresponding test board (100) comprises a support substrate (205), a set of one of more sockets (210) being mounted on the support substrate each one for housing an electronic device (105) to be tested with a main surface thereof facing the support substrate, for each socket a thermal conditioning element (235) for acting on the main surface of the electronic device, and for each socket biasing means (240) being switchable between an active condition, wherein the biasing means biases the thermal conditioning element in contact with the main surface of the electronic device, and a passive condition, wherein the biasing means maintains the thermal conditioning element separate from the main surface of the electronic device.

A burn-in board includes: a board; sockets mounted on the board; a connector mounted on the board; and wiring systems disposed in the board and connecting the sockets and the connector. The wiring systems comprise: a first wiring system that transmits a first signal; and a second wiring system that transmits a second signal different from the first signal, and a type of a first connection form of the first wiring system is different from a type of a second connection form of the second wiring system.

A chip test device and a chip test method are provided. The chip test device may include a chip socket and an interface card comprising a signal synthesizer, a plurality of first interfaces and a second interface. The signal synthesizer may be configured to synthesize a plurality of low-frequency first signals output from a plurality of testers into a high-frequency second signal and transmit the second signal to the chip socket. The plurality of first interfaces may be arranged in a plurality of inputs of the signal synthesizer for connecting the testers, and the second interface may be arranged in an output of the signal synthesizer for connecting the chip socket. By synthesizing the low-frequency first signals into the high-frequency second signal, a high-frequency test may be conducted using a plurality of low-frequency testers.