Patent classifications
G01R31/2656
Analysis method, analysis device, analysis program, and recording medium for recording analysis program
An inspection apparatus includes a light sensor that detects light from a semiconductor device to which an electric signal has been input, an optical system that guides light from the semiconductor device to the light sensor, and a control device electrically connected to the light sensor. The control device includes a measurement unit that acquires waveform data obtained by optical measurement for each of a plurality of positions on a defective semiconductor device and waveform data obtained by the optical measurement for each of a plurality of positions on a non-defective semiconductor device, a calculation unit that calculates a degree of correspondence between the waveform data of the defective semiconductor device and the waveform data of the non-defective semiconductor device, and an analysis unit that analyzes a defective part of the defective semiconductor device on the basis of the degree of correspondence for each of the plurality of positions.
Metrology apparatus and method for determining a characteristic of one or more structures on a substrate
Disclosed is a method for obtaining a computationally determined interference electric field describing scattering of radiation by a pair of structures comprising a first structure and a second structure on a substrate. The method comprises determining a first electric field relating to first radiation scattered by the first structure; determining a second electric field relating to second radiation scattered by the second structure; and computationally determining the interference of the first electric field and second electric field, to obtain a computationally determined interference electric field.
Semiconductor inspection device
An inspection system includes a light source, a mirror, Galvano mirrors, a casing that holds the mirror and the Galvano mirrors inside and includes an attachment portion for attaching an optical element, and a control unit that controls a deflection angle of the Galvano mirrors, wherein the control unit controls the deflection angle so that an optical path optically connected to a semiconductor device is switched between a first optical path passing through the Galvano mirrors and the mirror, and a second optical path passing through the Galvano mirrors and the attachment portion, and controls the deflection angle so that the deflection angle when switching to the first optical path has been performed and the deflection angle when switching to the second optical path has been performed do not overlap.
Wafter, wafer testing system, and method thereof
Herein disclosed are a wafer, a wafer testing system, and a method thereof. Said wafer testing method comprises the following steps. First, an incident light is provided toward a wafer. And, a wafer surface image corresponded to the wafer is generated. Then, determining whether the wafer surface image has a plurality of first strips and a plurality of second strips, and the plurality of first strips and the plurality of second strips are symmetrical. When the wafer surface image has the plurality of first strips and the plurality of second strips, and the plurality of first strips and the plurality of second strips are symmetrical, a qualified signal corresponded to the wafer is provided.
Microwave photoconductance spectrometer and methods of using the same
The present disclosure relates to a steady-state microwave conductivity method that includes modulating a light beam to form an amplitude modulated light having a modulation frequency ω.sub.1, producing a microwave waveform, exposing a sample to the amplitude modulated light and a first portion of the microwave waveform to produce an amplitude modulation signal on the first portion of the microwave waveform, and mixing a second portion of the microwave waveform and the amplitude modulation signal to produce a first signal and a second signal.
Test of an examination tool
There is provided a system and a method of testing an optical device in a scanner for scanning a semiconductor specimen, the method comprising controlling, by a processor and memory circuitry (PMC) operatively connected to the scanner, an optical element optically connected to the optical device to deviate an optical path of light transmitted by the optical device so to transmit towards an imaging sensor, thereby enabling acquiring, by the imaging sensor, image data informative of the optical device, wherein in a scanning mode the optical element enables light transmitting from the optical device towards another optical device comprised in the scanner, and processing the acquired image data to obtain results informative of operability of the optical device.
HIGH RESOLUTION IMAGING OF MICROELECTRONIC DEVICES
In an imaging method, a focal point of a focused optical beam is sequentially mechanically positioned at coarse locations in or on an integrated circuit (IC) wafer or chip. At each coarse location, a two-dimensional (2D) image or mapping tile is acquired by steering the focal point to fine locations on or in the IC wafer or chip using electronic beam steering and, with the focal point positioned at each fine location, acquiring an output signal produced in response to an electrical charge that is optically injected into the IC wafer or chip at the fine location by the focused optical beam. The 2D image or mapping tiles are combined, including stitching together overlapping 2D image or mapping tiles, to generate an image or mapping of the IC wafer or chip. The electronic beam steering may be performed using a galvo mirror. The set of coarse locations may span a three-dimensional (3D) volume.
TOPSIDE CONTACT DEVICE AND METHOD FOR CHARACTERIZATION OF HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) HETEROSTRUCTURE ON INSULATING AND SEMI-INSULATING SUBSTRATES
Methods of characterizing electrical properties of a semiconductor layer structure on a wafer with topside semiconductor layers on an insulating or semi-insulating substrate, the semiconductor layer structure including a high electron mobility transistor (HEMT) heterostructure with a two-dimensional electron gas (2DEG) at a heterointerface between the semiconductor layers of the heterostructure. The methods include: (a) physically contacting the topside of the wafer within a narrow border zone at an edge of the wafer with a flexible metal cantilever electrode of a contacting device, wherein the flexible metal cantilever electrode contacts one or more of the semiconductor layers exposed at the narrow border zone so that the flexible metal cantilever electrode is in electrical contact with the 2DEG; and (b) applying corona charge bias and measuring a surface voltage of the semiconductor layers using a non-contact probe while maintaining the electrical contact with the 2DEG. The physical contacting to the topside of the wafer is noncontaminating and noninvasive to the semiconductor layers.
PROBE SYSTEM AND MACHINE APPARATUS THEREOF
A probe system and a machine apparatus thereof are provided. The machine apparatus can be configured for optionally carrying at least one probe assembly. The machine apparatus includes a temperature control carrier module, a machine frame structure and a temperature shielding structure. The temperature control carrier module can be configured for carrying at least one predetermined object. The machine frame structure can be configured for partially covering the temperature control carrier module, and the machine frame structure has a frame opening for exposing the temperature control carrier module. The temperature shielding structure can be disposed on the machine frame structure for partially covering the frame opening, and the temperature shielding structure has a detection opening for exposing the at least one predetermined object. The temperature shielding structure has a gas guiding channel formed thereinside for allowing a predetermined gas in the gas guiding channel.
Semiconductor sample inspection device and inspection method
An inspection device includes a reference signal output section, a noise removal section, and an electrical characteristic measurement section. The reference signal output section is connected to an external power supply device in electrical parallel with a semiconductor sample, and outputs a reference signal according to the output of the external power supply device. The noise removal section outputs a noise removal signal obtained by removing a noise component of the output of the external power supply device from the current signal output from the semiconductor sample based on the reference signal. The electrical characteristic measurement section measures the electrical characteristic of the semiconductor sample based on the noise removal signal. The inspection device measures the electrical characteristic of the semiconductor sample to which a voltage is being applied by the external power supply device and which is being irradiated and scanned with light. The inspection device outputs a defective portion of the semiconductor sample based on the electrical characteristic.