The subject disclosure relates to a system and method for testing units-under-test (UUT) with a thermal shock. The thermal shock testing system can include a chamber having an inlet and an outlet, the chamber being configured to provide a thermal shock to a unit-under-test (UUT), a pump configured to fluidly connect to the inlet of the chamber and direct a temperature controlled liquid through a channel embedded in the chamber, and a boiler and a chiller fluidly connected to the pump, the temperature of the liquid being controlled by at least one valve configured to alternatively direct hot or cold fluid to the inlet of the chamber.

A system for testing a plurality of electrical circuits includes a first remote cooperative testing device including a testing component and a first transceiver and a second remote cooperative testing device including a conductive component and a second transceiver. In response to receiving instructions from a remote computing device, the first remote cooperative testing device locates a first electrical circuit and a second electrical circuit and selectively positions the testing component to electrically couple a first portion of the first electrical circuit to a first portion of the second electrical circuit at a first node, and the second remote cooperative testing device selectively positions the conductive component to electrically couple a second portion of the first electrical circuit to a second portion of the second electrical circuit at a second node, thereby forming a testing circuit between the first node and the second node.

A device may determine an analog gain for an aggregated analog signal. The aggregated analog signal may be associated with a calibration test to be used to determine a set of calibration parameters for a load test of a base station. The device may determine the set of calibration parameters for the load test based on an outcome of performing a calibration test. The set of calibration parameters may result in a set of digital gains approximately centered in a digital dynamic gain range. The device may perform the load test after determining the analog gain for the analog signal and based on the set of calibration parameters for the load test.

The subject disclosure relates to a system and method for testing units-under-test (UUT) with a thermal shock. The thermal shock testing system can include a chamber having an inlet and an outlet, the chamber being configured to provide a thermal shock to a unit-under-test (UUT), a pump configured to fluidly connect to the inlet of the chamber and direct a temperature controlled liquid through a channel embedded in the chamber, and a boiler and a chiller fluidly connected to the pump, the temperature of the liquid being controlled by at least one valve configured to alternatively direct hot or cold fluid to the inlet of the chamber.

A system for testing one or more electric circuits simultaneously includes one or more wireless testing devices connected to one or more electric circuits through wired connection, and a receiver device communicatively coupled to the one or more wireless testing devices through wireless connection. Each wireless testing device includes an input unit for converting a physical electrical input received from corresponding electric circuit, into an electrical signal, a generator unit configured to generate one or more variable service set identifier (SSID) communication signals based on corresponding input electrical signal, and a transmitter unit configured to transmit the one or more SSID communication signals to one or more receiver devices simultaneously. The receiver device is configured to receive and monitor the one or more SSID signals, to troubleshoot, verify, analyze, monitor, control and identify the one or more electrical circuits simultaneously.

The present disclosure provides a method of testing a single device under test (DUT) through multiple cores in parallel, which includes steps as follows. The test quantity of the DUT is calculated; the test quantity of the DUT is evenly allocated to to a plurality of test cores, so as to control a period of testing the DUT through the test cores in parallel.

A system for testing a plurality of electrical circuits includes a first remote cooperative testing device for selectively and electrically coupling a first electrical circuit and a second electrical circuit of the plurality of electrical circuits at a first node, and a second remote cooperative testing device for selectively and electrically coupling the first and second electrical circuits at a second node. A testing circuit is formed between the first node and the second node by the first and second remote cooperative testing devices.

FPAs on a wafer can be tested prior to dicing the wafer into individual dies. A focal plane array (FPA) can comprise an array of photodetectors, such as microbolometers, on a semiconductor substrate or die. FPAs can be manufactured on a wafer to make multiple FPAs on a single wafer that can be later diced or divided into individual FPAs. Prior to dicing the wafer, the FPAs can be tested electrically and radiometrically in bulk to characterize individual FPAs, to identify bad pixels, to identify bad chips, to calibrate individual FPAs, and the like. These test results can be used to determine acceptable FPAs and can be used to provide initial settings for imaging systems with the tested and integrated FPA.

The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes.

Embodiments described herein provide a system for cable length measurement in a communication system. The system includes a transmitter, a receiver, a signal sampler and a cable length calculation unit. The transmitter is configured to transmit a plurality of data symbols at a first data rate via a wired data communication link, and the receiver is configured to receive a reflection signal. The signal sampler is configured to sample the received reflection signal using a phase shift number of shifting sampling phases to generate reflection samples, and combine the reflection samples with different sampling phases to generate a series of reflection samples corresponding to a second data rate higher than the first data rate. The cable length calculation unit is configured to determine a delay parameter from the series of reflection samples, and generate an estimate of a length of the data communication link.