A semiconductor integrated circuit (IC) comprising a signal path combiner, comprising a plurality of input paths and an output path. The IC comprises a delay circuit having an input electrically connected to the output path, the delay circuit delaying an input signal by a variable delay time to output a delayed signal path. The IC may comprise a first storage circuit electrically connected to the output path and a second storage circuit electrically connected to the delayed signal path. The IC comprises a comparison circuit that compares outputs of the signal path combiner and the delayed signal, wherein the comparison circuit comprises a comparison output provided in a comparison data signal to at least one mitigation circuit.

Detection circuitry for an integrated circuit (IC) includes voltage divider circuitry, comparison circuitry, and calibration circuitry. The voltage divider circuitry receives a power supply signal and output a first reference voltage signal and a supply voltage signal based on the power supply signal. The comparison circuitry compares the first reference voltage signal and the supply voltage signal to generate an output signal. The calibration circuitry alters one or more parameters of the voltage divider circuitry to increase a voltage value of the supply voltage signal based on the comparison of the first reference voltage signal with the supply voltage signal.

A radio frequency identification (RFID) transponder includes a current control module for controlling a current consumption of a memory based on an amount of available power, and a control logic for controlling a memory operation in response to the control of the current consumption by the current control module. The RFID transponder further includes a power detector that is configured to continuously monitor and detect the amount of available power and output a power-dependent control signal. The power-dependent control signal is used by the RFID transponder to control the current consumption of the memory in dependence on the available power.

According to one embodiment, a multichannel switch integrated circuit (IC) includes a multichannel switch circuit and a common test terminal. The multichannel switch circuit includes a plurality of switch circuitries. Each of the switch circuitries includes: an output transistor that outputs an output signal through an output terminal; an overcurrent detection circuit that detects a detection current according to a current flowing through the output transistor; and a diode having an anode that receives the detection current. The common test terminal is connected to each channel switch circuitry, connected to the overcurrent detection circuit through the diode, and connected to a cathode of the diode.

The excitation of processing paths in a microelectronic circuit is organized by providing one or more pieces of input information to a decision-making software, and executing the decision-making software to decide, whether one or more of said processing paths of the microelectronic circuit are to be excited with test signals. Deciding that said processing paths are to be excited with said test signals results in proceeding to excite said one or more of said processing paths with said test signals and monitoring whether timing events occur on such one or more excited processing paths. A timing event is a change in a digital value at an input of a respective register circuit on an excited processing path, which change took place later than an allowable time limit defined by a triggering signal to said respective register circuit.

A method for battery capacity estimation is provided. The method includes monitoring a sensor, collecting a plurality of data points including a voltage-based state of charge value and an integrated current value, defining within the data points a first data set collected during a first time period and a second data set collected during a second time period, determining an integrated current error related to the second data set, comparing the integrated current error related to the second data set to a threshold integrated current error. When the error related to the second data set exceeds the threshold, the method further includes resetting the second data set based upon an integrated current value from the first time period. The method further includes combining the data sets to create a combined data set and determining a voltage slope capacity estimate as a change in integrated current versus voltage-based state of charge.

Examples relate to a current sensor and to a method for sensing a strength of an electric current using two groups of magnetic sensing probes. The current sensor includes a first group and a second group of magnetic sensing probes. The current sensor comprises sensor circuitry coupled to the first and the second group of magnetic sensing probes. The sensor circuitry is configured to determine a first differential magnetic field measurement of a magnetic field using probes of the first group of magnetic sensing probes. The sensor circuitry is configured to determine a second differential magnetic field measurement of the magnetic field using probes of the second group of magnetic sensing probes. The sensor circuitry is configured to determine a strength of the electric current based on a difference between the first differential magnetic field measurement and the second differential magnetic field measurement.

Embodiments of the invention provide for integrated circuits for testing one or more transistors for process variation effects. According to an embodiment, the integrated circuit can include: a plurality of ring oscillator macro circuits, wherein each ring oscillator macro circuit includes two ring oscillators, a first multiplexer, and a first divide-by-two circuit; a multiplexer stage; a divide-by-two circuit stage; a second multiplexer; a second divide-by-two circuit; and frequency measurement circuit. According to another embodiment, the integrated circuit can include: a first shift register including a plurality of devices-under-test; a second shift register including a plurality of static latches; a first multiplexer configured to receive outputs from each of the plurality of DUTs; a second multiplexer configured to receive outputs from each of the plurality of static latches; and a comparator configured to compare an output from the first multiplexer with an output from the second multiplexer.

An integrated circuit die includes a core fabric configurable to include an aging measurement circuit and a device manager coupled to the core fabric to operate the aging measurement circuit for a select period of time. The aging measurement circuit includes a counter to count transitions of a signal propagating through the aging measurement circuit during the select period of time when the aging measurement circuit is operating. The transitions of the signal counted by the counter during the select period of time are a measure of an aging characteristic of the integrated circuit die.

In accordance with at least one aspect of this disclosure, a controller for an aircraft electrical system includes, a software safe module. In embodiments, the software safe module can be configured to determine whether there was a sudden power failure upon controller initialization, and cause operation of the controller in a software safe mode if there was a sudden power failure such that manual intervention is required to leave the software safe mode to prevent repetitive power failure of the controller.