G02B2006/12128

Method for fabricating a heterostructure comprising active or passive elementary structure made of III-V material on the surface of a silicon-based substrate

A process for fabricating a heterostructure includes at least one elementary structure made of III-V material on the surface of a silicon-based substrate successively comprising: producing a first pattern having at least a first opening in a dielectric material on the surface of a first silicon-based substrate; a first operation for epitaxy of at least one III-V material so as to define at least one elementary base layer made of III-V material in the at least first opening; producing a second pattern in a dielectric material so as to define at least a second opening having an overlap with the elementary base layer; a second operation for epitaxy of at least one III-V material on the surface of at least the elementary base layer made of III-V material(s) so as to produce the at least elementary structure made of III-V material(s) having an outer face; an operation for transferring and assembling the at least photonic active elementary structure via its outer face, on an interface that may comprise passive elements and/or active elements, the interface being produced on the surface of a second silicon-based substrate; removing the first silicon-based substrate and the at least elementary base layer located on the elementary structure.

SINGLE PHOTON SOURCES
20220381979 · 2022-12-01 ·

A single photon source comprises a photon emitter (10), an excitation waveguide (30) arranged to direct excitation photons having a first polarisation direction into the photon emitter, and a collection waveguide (42) arranged to collect photons having a second polarisation direction from the photon emitter. The first polarisation direction is coupled to a first exciton state of the photon emitter and the second polarisation direction is non-parallel to the first polarisation direction and is coupled to a second exciton state of the photon emitter, and the first and second exciton states have substantially equal energies.

OPTICAL WAVEGUIDE CIRCUITS HAVING LATERALLY TILTED WAVEGUIDE CORES
20220350078 · 2022-11-03 · ·

A photonic integrated circuit (PIC) in which some optical waveguides have laterally tilted waveguide cores used to implement passive polarization-handling circuit elements, e.g., suitable for processing polarization-division-multiplexed optical communication signals. Different sections of such waveguide cores may have continuously varying or fixed lateral tilt angles. Different polarization-handling circuit elements can be realized, e.g., using different combinations of end-connected untilted and laterally tilted waveguide-core sections. In some embodiments, laterally tilted waveguide cores may incorporate multiple-quantum-well structures and be used to implement active circuit elements. At least some embodiments beneficially lend themselves to highly reproducible fabrication processes, which can advantageously be used to achieve a relatively high yield of the corresponding PICs during manufacture.

Etched facet in a multi quantum well structure

An exemplary multi quantum well structure may include a silicon platform having a pit formed in the silicon platform, a chip positioned inside the pit, a first waveguide formed in the chip, and a second waveguide formed in the silicon platform. The pit may be defined at least in part by a sidewall and a base. The chip may include a first side and a first recess in the first side. The first side may be defined in part by a first cleaved or diced facet. The first recess may be defined in part by a first etched facet. The first waveguide may be configured to guide an optical beam to pass through the first etched facet. The second waveguide may be configured to guide the optical beam to pass through the sidewall. The second waveguide may be optically aligned with the first waveguide.

OPTICAL DEVICE HAVING A LIGHT-EMITTING STRUCTURE AND A WAVEGUIDE INTEGRATED CAPACITOR TO MONITOR LIGHT
20230143150 · 2023-05-11 ·

Examples described herein relate to an optical device with an integrated light-emitting structure to generate light and a waveguide integrated capacitor to monitor light. The light-emitting structure may emit light upon the application of electricity to the optical device. The waveguide integrated capacitor may be formed under the light-emitting structure to monitor the light emitted by the light-emitting structure. The waveguide integrated capacitor includes a waveguide region carrying at least a portion of the light. The waveguide region includes one or more photon absorption sites causing the generation of free charge carriers relative to an intensity of the light confined in the waveguide region resulting in a change in the conductance of the waveguide region.

OPTICAL WAVEGUIDE, METHOD FOR MANUFACTURING OPTICAL WAVEGUIDE, AND OPTICAL SEMICONDUCTOR DEVICE
20230136090 · 2023-05-04 ·

An optical waveguide is an optical waveguide including a semiconductor quantum well structure, the optical waveguide including a first region in which the semiconductor quantum well structure is not disordered and a second region in which the semiconductor quantum well structure is disordered. The first region has a first bandgap wavelength, the second region has a second bandgap wavelength, and a region in which the semiconductor quantum well structure is disordered in such a manner that a bandgap wavelength continuously decreases from the first bandgap wavelength to the second bandgap wavelength is provided between the first region and the second region.

Controlled tunneling waveguide integration (CTWI) for effective coupling between different components in a photonic chip

The invention describes an integrated photonics platform comprising a plurality of at least three vertically-stacked waveguides which enables light transfer from one waveguide of the photonic structure into another waveguide by means of controlled tunneling method. The light transfer involves at least three waveguides wherein light power flows from initial waveguide into the final waveguide while tunneling through the intermediate ones. As an exemplary realization of the controlled tunneling waveguide integration, the invention describes a photonic integrated structure consisting of laser guide as upper waveguide, passive guide as middle waveguide, and modulator guide as lower waveguides. Controlled tunneling is enabled by the overlapped lateral tapers formed on the same or different vertical waveguide levels. In the further embodiments, the controlled tunneling platform is modified to implement wavelength-(de)multiplexing, polarization-splitting and beam-splitting functions.

Integrated grating coupler

A grating coupler having first and second ends for coupling a light beam to a waveguide of a chip includes a substrate configured to receive the light beam from the first end and transmit the light beam through the second end, the substrate having a first refractive index n1, a grating structure having curved grating lines arranged on the substrate, the grating structure having a second refractive index n1, wherein the curved grating lines have line width w and height d and are arranged by a pitch Λ, wherein the second refractive index n2 is less than first refractive index n1, and a cladding layer configured to cover the grating structure, wherein the cladding layer has a third refractive index n3.

Etched facet in a multi quantum well structure

An exemplary multi quantum well structure may include a silicon platform having a pit formed in the silicon platform, a chip positioned inside the pit, a first waveguide formed in the chip, and a second waveguide formed in the silicon platform. The pit may be defined at least in part by a sidewall and a base. The chip may include a first side and a first recess in the first side. The first side may be defined in part by a first cleaved or diced facet. The first recess may be defined in part by a first etched facet. The first waveguide may be configured to guide an optical beam to pass through the first etched facet. The second waveguide may be configured to guide the optical beam to pass through the sidewall. The second waveguide may be optically aligned with the first waveguide.

ETCHED FACET IN A MULTI QUANTUM WELL STRUCTURE
20220196911 · 2022-06-23 ·

An exemplary multi quantum well structure may include a silicon platform having a pit formed in the silicon platform, a chip positioned inside the pit, a first waveguide formed in the chip, and a second waveguide formed in the silicon platform. The pit may be defined at least in part by a sidewall and a base. The chip may include a first side and a first recess in the first side. The first side may be defined in part by a first cleaved or diced facet. The first recess may be defined in part by a first etched facet. The first waveguide may be configured to guide an optical beam to pass through the first etched facet. The second waveguide may be configured to guide the optical beam to pass through the sidewall. The second waveguide may be optically aligned with the first waveguide.