An electro-optical chip includes an optical input port, an optical output port, and an optical waveguide having a first end optically connected to the optical input port and a second end optically connected to the optical output port. The optical waveguide includes one or more segments. Different segments of the optical waveguide extends in either a horizontal direction, a vertical direction, a direction between horizontal and vertical, or a curved direction. The electro-optical chip also includes a plurality of optical microring resonators is positioned along at least one segment of the optical waveguide. Each microring resonator of the plurality of optical microring resonators is optically coupled to a different location along the optical waveguide. The electro-optical chip also includes electronic circuitry for controlling a resonant wavelength of each microring resonator of the plurality of optical microring resonators.

An arrayed waveguide grating device includes an input coupler configured to receive a light signal and split the light signal into a plurality of output light signals. The device also includes a plurality of waveguides optically connected to the input coupler, each waveguide having a plurality of waveguide portions having respective sensitivities to variance in one or more parameters associated with operating of the optical arrayed grating device. Lengths of the respective portions are determined such that each waveguide applies a respective phase shift to the output light signal that propagates through the waveguide and the plurality of waveguides have at least substantially same change in phase shift with respective changes in the one or more parameters associated with operation of the device. An output coupler is optically connected to the plurality of waveguides to map respective light signals output from the plurality of waveguides to respective focal positions.

An integrated photonic device for wavelength division multiplexing comprises: a wavelength-splitting/combining component configured to be re-used for both splitting a single signal to be split, wherein the signal to be split comprises plural wavelengths, to plural split signals, wherein each of the plural split signals is related to a unique wavelength band, and combining plural signals to be combined, wherein each of the plural signals to be combined is related to a unique wavelength band, to a single combined signal, wherein the wavelength-splitting/combining component comprises at least one output channel for providing an output signal and at least one response channel for receiving a response input signal from a light interaction induced by the output signal, wherein the output channel and the response channel are connected to different ports of the wavelength-splitting/combining component.

A chamberless smoke detector includes a source laser, a grating coupler, a transmitting optical phase array, a receiving optical phase array, and a processing unit.

Examples described herein relate to an optical device, such as, a ring resonator, that includes a ring waveguide. The ring resonator includes a ring waveguide to allow passage of light therethrough. Further, the ring resonator includes a modulator formed along a first section of the circumference of the ring waveguide to modulate the light inside the ring waveguide based on an application of a first reverse bias voltage to the modulator. Moreover, the ring resonator includes an avalanche photodiode (APD) isolated from the modulator and formed along a second section of the circumference of the ring waveguide to detect the intensity of the light inside the ring waveguide based on an application of a second reverse bias voltage to the APD. The second section is shorter than the first section, and the second reverse bias voltage is higher than the first reverse bias voltage.

Various embodiments of the present disclosure are directed towards a method for forming an integrated chip the method includes forming a waveguide on a first surface of a substrate. A conductive structure is formed at least partially overlying the waveguide. A light pipe structure is formed over the waveguide. A lower surface of the light pipe structure is disposed between a top surface and a bottom surface of the conductive structure. A lower portion of the light pipe structure contacts the conductive structure.

An optoelectronic chip includes optical inputs having different passbands, a photonic circuit to be tested, and an optical coupling device configured to couple said inputs to the photonic circuit to be tested.

Techniques and mechanisms for facilitating horizontal communication with a photonic integrated circuit (PIC) chip, and a lens structure which is optically coupled thereto. In an embodiment, a PIC chip comprises integrated circuitry, photonic waveguides, and integrated edge-oriented couplers (IECs) which are coupled to the integrated circuitry via the photonic waveguides. The PIC chip forms respective first divergent lens surfaces of the IECs, which are each at a respective terminus of a corresponding one of the photonic waveguides. A lens structure, which is adjacent to the IECs, comprises a second divergent lens surface having an orientation which is substantially orthogonal to the respective orientations of the first divergent lens surfaces. In another embodiment, an edge of the PIC chip forms one or more recess structures, and the lens structure comprises one or more tenon portions which each extends into a respective recess structure of the one or more recess structures.

Silicon photonic integrated circuit (PIC) on a multi-zone semiconductor on insulator (SOI) substrate having at least a first zone and a second zone. Various optical devices of the PIC may be located above certain substrate zones that are most suitable. A first length of a photonic waveguide structure comprises the crystalline silicon and is within the first zone, while a second length of the waveguide structure is within the second zone. Within a first zone, the crystalline silicon layer is spaced apart from an underlying substrate material by a first thickness of dielectric material. Within the second zone, the crystalline silicon layer is spaced apart from the underlying substrate material by a second thickness of the dielectric material.

Integrated circuit packages may be formed having at least one optical via extending from a first surface of a package substrate to an opposing second surface of the package substrate. The at least one optical via creates an optical link between the opposing surfaces of the package substrate that enables the fabrication of a dual-sided optical multiple chip package, wherein integrated circuit devices can be attached to both surfaces of the package substrate for increased package density.