A cavity substrate may have a directional optoelectronic transmission channel. The cavity substrate includes a support frame, a first dielectric layer on a first surface of the support frame, and a second dielectric layer on a second surface of the support frame. The support frame, the first dielectric layer and the second dielectric layer constitute a closed cavity having an opening on one side in the length direction of the substrate, a first circuit layer is arranged on the inner surface of the first dielectric layer facing the cavity, an electrode connected with an optical communication device is arranged on the first circuit layer, the electrode is electrically conducted with the first circuit layer, a second circuit layer is arranged on the outer surfaces of the first dielectric layer and the second dielectric layer, and the first circuit layer and the second circuit layer are communicated through a via column.

A cavity substrate may have a directional optoelectronic transmission channel. The cavity substrate includes a support frame, a first dielectric layer on a first surface of the support frame, and a second dielectric layer on a second surface of the support frame. The support frame, the first dielectric layer and the second dielectric layer constitute a closed cavity having an opening on one side in the length direction of the substrate, a first circuit layer is arranged on the inner surface of the first dielectric layer facing the cavity, an electrode connected with an optical communication device is arranged on the first circuit layer, the electrode is electrically conducted with the first circuit layer, a second circuit layer is arranged on the outer surfaces of the first dielectric layer and the second dielectric layer, and the first circuit layer and the second circuit layer are communicated through a via column.

Described herein are stacked photonic integrated circuit (PIC) assemblies that include multiple layers of waveguides. The waveguides are formed of substantially monocrystalline materials, which cannot be repeatedly deposited. Layers of monocrystalline material are fabricated and repeatedly transferred onto the PIC structure using a layer transfer process, which involves bonding a monocrystalline material using a non-monocrystalline bonding material. Layers of isolation materials are also deposited or layer transferred onto the PIC assembly.

Described herein are stacked photonic integrated circuit (PIC) assemblies that include multiple layers of waveguides. The waveguides are formed of substantially monocrystalline materials, which cannot be repeatedly deposited. Layers of monocrystalline material are fabricated and repeatedly transferred onto the PIC structure using a layer transfer process, which involves bonding a monocrystalline material using a non-monocrystalline bonding material. Layers of isolation materials are also deposited or layer transferred onto the PIC assembly.

A photonic integrated circuit device can comprise one or more layers having different refraction indices that cause optical coupling issues and losses from layer variations. A film of material can be applied to a layer of the photonic integrated circuit to avoid the issues to increase the optical bandwidth of the photonic integrated circuit device and decrease sensitivity to manufacturing and design processes.

Aspects of the present disclosure are directed to configurations of compact ultra-low loss integrated photonics-based waveguides for optical gyroscope applications, and the methods of fabricating those waveguides for ease of large scale manufacturing. Four main process flows are described: (1) process flow based on a repeated sequence of oxide deposition and anneal; (2) chemical-mechanical polishing (CMP)-based process flow followed by wafer bonding; (3) Damascene process flow followed by oxide deposition and anneal, or wafer bonding; and (4) CMP-based process flows followed by oxide deposition. Any combination of these process flows may be adopted to meet the end goal of fabricating optical gyroscope waveguides in one or more layers on a silicon substrate using standard silicon fabrication technologies.

Electrical test of optical components via metal-insulator-semiconductor capacitor structures is provided via a plurality of optical devices including a first material embedded in a second material, wherein each optical device is associated with a different thickness range of a plurality of thickness ranges for the first material; a first capacitance measurement point including the first material embedded in the second material; and a second capacitance measurement point including a region from which the first material has been replaced with the second material.

Provided is a method of manufacturing an optical integrated device. The method includes forming a lower clad layer on a substrate, forming a plurality of mask patterns arranged in one direction on the lower clad layer, forming a core layer on a portion of the lower clad layer by a selective area growth method using the mask patterns as deposition masks, and forming an upper clad layer on the core layers, wherein the mask patterns have different widths or include mask layers of different materials.

Provided is a method of manufacturing an optical integrated device. The method includes forming a lower clad layer on a substrate, forming a plurality of mask patterns arranged in one direction on the lower clad layer, forming a core layer on a portion of the lower clad layer by a selective area growth method using the mask patterns as deposition masks, and forming an upper clad layer on the core layers, wherein the mask patterns have different widths or include mask layers of different materials.

A photonic structure can include in one aspect one or more waveguides formed by patterning of waveguiding material adapted to propagate light energy. Such waveguiding material may include one or more of silicon (single-, poly-, or non-crystalline) and silicon nitride.