An acoustic scatterometer has an acoustic source operable to project acoustic radiation onto a periodic structure and formed on a substrate. An acoustic detector is operable to detect the −1st acoustic diffraction order diffracted by the periodic structure and while discriminating from specular reflection (0th order). Another acoustic detector is operable to detect the +1st acoustic diffraction order diffracted by the periodic structure, again while discriminating from the specular reflection (0th order). The acoustic source and acoustic detector may be piezo transducers. The angle of incidence of the projected acoustic radiation and location of the detectors and are arranged with respect to the periodic structure and such that the detection of the −1st and +1st acoustic diffraction orders and discriminates from the 0th order specular reflection.

Wafer-to-wafer and within-wafer image contrast variations can be identified and mitigated by extracting an image frame during recipe setup and then during runtime at the same location. Image contrast is determined for the two image frames. A ratio of the contrast for the two image frames can be used to determine contrast variations and focus variation.

In a dark-field metrology method using a small target, a characteristic of an image of the target, obtained using a single diffraction order, is determined by fitting a combination fit function to the measured image. The combination fit function includes terms selected to represent aspects of the physical sensor and the target. Some coefficients of the combination fit function are determined based on parameters of the measurement process and/or target. In an embodiment the combination fit function includes jinc functions representing the point spread function of a pupil stop in the imaging system.

A method including: computing a value of a first variable of a pattern of, or for, a substrate processed by a patterning process by combining a fingerprint of the first variable on the substrate and a certain value of the first variable; and determining a value of a second variable of the pattern based at least in part on the computed value of the first variable.

An overlay mark includes a first, a second, a third, and a fourth component. The first component is located in a first region of the first overlay mark and includes a plurality of gratings that extend in a first direction. The second component is located in a second region of the first overlay mark and includes a plurality of gratings that extend in the first direction. The third component is located in a third region of the first overlay mark and includes a plurality of gratings that extend in a second direction different from the first direction. The fourth component is located in a fourth region of the first overlay mark and includes a plurality of gratings that extend in the second direction. The first region is aligned with the second region. The third region is aligned with the fourth region.

A method for metrology includes directing at least one illumination beam to illuminate a semiconductor wafer on which at least first and second patterned layers have been deposited in succession, including a first target feature in the first patterned layer and a second target feature in the second patterned layer, overlaid on the first target feature. A sequence of images of the first and second target features is captured while varying one or more imaging parameters over the sequence. The images in the sequence are processed in order to identify respective centers of symmetry of the first and second target features in the images and measure variations in the centers of symmetry as a function of the varying image parameters. The measured variations are applied in measuring an overlay error between the first and second patterned layers.

A method of performing a lithography process includes providing a test pattern. The test pattern includes a first set of lines arranged at a first pitch, a second set of lines arranged at the first pitch, and further includes at least one reference line between the first set of lines and the second set of lines. The test pattern is exposed with a radiation source providing an asymmetric, monopole illumination profile to form a test pattern structure on a substrate. The test pattern structure is then measured and a measured distance correlated to an offset of a lithography parameter. A lithography process is adjusted based on the offset of the lithography parameter.

Apparatus and methods for determining a focus error for a lithographic apparatus and/or a difference between first and second metrology data. The first and/or second metrology data includes a plurality of values of a parameter relating to a substrate, the substrate including a plurality of fields including device topology. The apparatus may include a processor configured to execute computer program code to cause the processor to: determine an intra-field component of the parameter; remove the determined intra-field component from the first metrology data to obtain an inter-field component of the first metrology data; and determine the difference between the first metrology data and second metrology data based on the inter-field component and the second metrology data.

A method for determining a best focus and a best dose in the disclosure includes selecting a selection pattern from first and second shot regions of a wafer for split, measuring a critical dimension (CD) value of the selection pattern, thereby deriving a measurement CD value, calculating an effective CD value of the selection pattern for each of the first and second shot regions using the measurement CD value, calculating an upper-limit CD value and a lower-limit CD value of the selection pattern using the effective CD value of the selection pattern, calculating a process window area for the first shot region and a process window area for the second shot region using the upper-limit CD value and the lower-limit CD value of the selection pattern, and comparing the process window area for the first shot region and the process window area for the second shot region with each other.

In a method executed in an exposure apparatus, a focus control effective region and a focus control exclusion region are set based on an exposure map and a chip area layout within an exposure area. Focus-leveling data are measured over a wafer. A photo resist layer on the wafer is exposed with an exposure light. When a chip area of a plurality of chip areas of the exposure area is located within an effective region of a wafer, the chip area is included in the focus control effective region, and when a part of or all of a chip area of the plurality of chip areas is located on or outside a periphery of the effective region of the wafer, the chip area is included in the focus control exclusion region In the exposing, a focus-leveling is controlled by using the focus-leveling data measured at the focus control effective region.