G04G3/02

MANAGING A TIME REFERENCE
20220197333 · 2022-06-23 ·

A system for managing a time reference includes a real-time clock, an interface, and a processor. The real-time clock store an RTC time. The interface is configured to receive a GPS time and a cellular time. The processor is configured to: indicate to start a time-speed adjustment loop; determine a true time based at least in part on the GPS time and the cellular time; determine an error between the true time and the RTC time; determine an RTC speed calibration adjustment based at least in part on the error; and adjust the real-time clock speed based at least in part on the RTC speed calibration adjustment.

Managing a time reference
11226650 · 2022-01-18 · ·

A system for managing a time reference includes a real-time clock, an interface, and a processor. The real-time clock store an RTC time. The interface is configured to receive a GPS time and a cellular time. The processor is configured to: indicate to start a time-speed adjustment loop; determine a true time based at least in part on the GPS time and the cellular time; determine an error between the true time and the RTC time; determine an RTC speed calibration adjustment based at least in part on the error; and adjust the real-time clock speed based at least in part on the RTC speed calibration adjustment.

Managing a time reference
11226650 · 2022-01-18 · ·

A system for managing a time reference includes a real-time clock, an interface, and a processor. The real-time clock store an RTC time. The interface is configured to receive a GPS time and a cellular time. The processor is configured to: indicate to start a time-speed adjustment loop; determine a true time based at least in part on the GPS time and the cellular time; determine an error between the true time and the RTC time; determine an RTC speed calibration adjustment based at least in part on the error; and adjust the real-time clock speed based at least in part on the RTC speed calibration adjustment.

METHODS AND APPARATUS FOR LOW JITTER FRACTIONAL OUTPUT DIVIDERS

An example digital to time converter includes: a first switch having a first terminal, a second terminal, and a first control terminal configured to receive a control signal. A second switch having a third terminal coupled to second terminal, a fourth terminal, and a second control terminal configured to receive a divided clock signal. A third switch having a fifth terminal coupled to the second terminal and the third terminal, a sixth terminal, and a third control terminal configured to receive an inverted version of divided clock signal. A fourth switch having a seventh terminal coupled to the second terminal, an eighth terminal, and a fourth control terminal configured to receive an inverted version of control signal. A fifth switch having a ninth terminal coupled to the eighth terminal and a fifth control terminal configured to receive the inverted divided clock signal. A capacitor coupled to the sixth terminal.

METHODS AND APPARATUS FOR LOW JITTER FRACTIONAL OUTPUT DIVIDERS

An example digital to time converter includes: a first switch having a first terminal, a second terminal, and a first control terminal configured to receive a control signal. A second switch having a third terminal coupled to second terminal, a fourth terminal, and a second control terminal configured to receive a divided clock signal. A third switch having a fifth terminal coupled to the second terminal and the third terminal, a sixth terminal, and a third control terminal configured to receive an inverted version of divided clock signal. A fourth switch having a seventh terminal coupled to the second terminal, an eighth terminal, and a fourth control terminal configured to receive an inverted version of control signal. A fifth switch having a ninth terminal coupled to the eighth terminal and a fifth control terminal configured to receive the inverted divided clock signal. A capacitor coupled to the sixth terminal.

Time synchronization device, and method and program therefor

A time synchronization method that is capable of selecting whether synchronization, by a timepiece unit that generates a time signal synchronized with a standard time and outputs it to an exterior, with the time is performed by time information obtained by receiving a radio wave including information relating to the time, or is performed by means of a holdover performed using a clock signal from an internal or external clock source. A schedule having a first time period in which the above-mentioned time information is used, and a second time period by means of the holdover is determined according to temporal reception characteristics of the radio wave at a reception location of the radio wave, and according to the schedule, supplying the timepiece unit with the time information or supplying the timepiece unit with the clock signal from the internal or external clock source.

Time synchronization device, and method and program therefor

A time synchronization method that is capable of selecting whether synchronization, by a timepiece unit that generates a time signal synchronized with a standard time and outputs it to an exterior, with the time is performed by time information obtained by receiving a radio wave including information relating to the time, or is performed by means of a holdover performed using a clock signal from an internal or external clock source. A schedule having a first time period in which the above-mentioned time information is used, and a second time period by means of the holdover is determined according to temporal reception characteristics of the radio wave at a reception location of the radio wave, and according to the schedule, supplying the timepiece unit with the time information or supplying the timepiece unit with the clock signal from the internal or external clock source.

METHOD AND SYSTEM FOR ESTIMATING THE DRIFT OF A CLOCK FOR DATING SEISMIC DATA SAMPLES
20210263477 · 2021-08-26 ·

The method for estimating the drift over time of a physical operating parameter of a clock for dating seismic data samples associated with a seismic data collection node involves measuring (10) at least one quantity associated with the clock, at predetermined instants or during predetermined time periods, and applying (12), to this quantity, a predetermined non-linear law of variation of this quantity that depends on the values collected during the measurement step (10), so as to obtain an estimation of the drift over time of the physical operating parameter.

METHOD AND SYSTEM FOR ESTIMATING THE DRIFT OF A CLOCK FOR DATING SEISMIC DATA SAMPLES
20210263477 · 2021-08-26 ·

The method for estimating the drift over time of a physical operating parameter of a clock for dating seismic data samples associated with a seismic data collection node involves measuring (10) at least one quantity associated with the clock, at predetermined instants or during predetermined time periods, and applying (12), to this quantity, a predetermined non-linear law of variation of this quantity that depends on the values collected during the measurement step (10), so as to obtain an estimation of the drift over time of the physical operating parameter.

Semiconductor device, movement and electronic watch
10826430 · 2020-11-03 · ·

An oscillating circuit includes an input terminal and an output terminal, to both of which an oscillator is coupled, a DC cut capacitor having one terminal of two terminals that is coupled to the input terminal, an inverter having an input side coupled to the other terminal of the DC cut capacitor and an output side coupled to the output terminal, a first feedback resistor coupled in parallel to the inverter, a second feedback resistor coupled in parallel to the DC cut capacitor and the inverter, and a switch coupled in parallel to the DC cut capacitor.