A communication unit (S1, S2) for industrial automation for use in a communication system (10) of series-connected communication units (M, S1, S2). The communication unit includes a first input (E1), a first output (A1), and an internal clock generator (TG) which is adapted to provide an internal clock signal as system clock for clocking the communication unit (S1, S2), and wherein the communication unit (S1, S2) is configured to receive, via the input (E1), a serial input data stream with payload data. The communication unit (S1, S2) has a timer (ZG) for providing a time value, the timer (ZG) being adapted to provide the time value based on an input symbol clock included in the input data stream.

A checking apparatus can test at least one first closed-loop control unit. The checking apparatus can include a first timing transmission unit which can generate a first periodic timing signal from a first time signal, and which can output the first periodic timing signal to a first PLL. The check device can further include a first oscillator which can generate a second periodic timing signal and which can output the second periodic timing signal to a second PLL. The checking device can additionally include a first clock, and can forward a first clock signal to a first input/output unit, and/or to a first computation unit. A first changeover signal can be used to control a first multiplexer such that depending on a state of the first changeover signal, the first multiplexer can forward either a first frequency-stabilized timing signal or a second frequency-stabilized timing signal to the first clock.

A communication unit (S1, S2) for industrial automation for use in a communication system (10) of series-connected communication units (M, S1, S2). The communication unit includes a first input (E1) and a first output (A1) and being configured to receive, via the input (E1), an input serial data stream having payload data and to output, via the output (A1), an output serial data stream (ADS) having payload data. The communication unit (S1, S2) is configured to determine clock information (TI) on the basis of an internal reference clock signal of the communication unit (S1, S2) and an input symbol clock of the input data stream and, using the clock information (TI), to provide the output data stream (ADS) with an output symbol clock whose clock rate is equal to the clock rate of the input symbol clock.

A communication unit (S1, S2) for industrial automation for use in a communication system (10) of series-connected communication units (M, S1, S2). The communication unit includes a first input (E1) and a first output (A1) and being configured to receive, via the input (E1), an input serial data stream having payload data and to output, via the output (A1), an output serial data stream (ADS) having payload data. The communication unit (S1, S2) is configured to determine clock information (TI) on the basis of an internal reference clock signal of the communication unit (S1, S2) and an input symbol clock of the input data stream and, using the clock information (TI), to provide the output data stream (ADS) with an output symbol clock whose clock rate is equal to the clock rate of the input symbol clock.

A communication unit (S1, S2) for industrial automation for use in a communication system (10) of series-connected communication units (M, S1, S2). The communication unit includes a first input (E1), a first output (E1), and an internal clock generator (TG) which is adapted to provide an internal clock signal as system clock for clocking the communication unit (S1, S2), and wherein the communication unit (S1, S2) is configured to receive, via the input (E1), a serial input data stream with payload data. The communication unit (S1, S2) has a timer (ZG) for providing a time value, the timer (ZG) being adapted to provide the time value based on an input symbol clock included in the input data stream.

A checking apparatus can test at least one first closed-loop control unit. The checking apparatus can include a first timing transmission unit which can generate a first periodic timing signal from a first time signal, and which can output the first periodic timing signal to a first PLL. The check device can further include a first oscillator which can generate a second periodic timing signal and which can output the second periodic timing signal to a second PLL. The checking device can additionally include a first clock, and can forward a first clock signal to a first input/output unit, and/or to a first computation unit. A first changeover signal can be used to control a first multiplexer such that depending on a state of the first changeover signal, the first multiplexer can forward either a first frequency-stabilized timing signal or a second frequency-stabilized timing signal to the first clock.