Patent classifications
G05F1/46
NOISE MITIGATION IN SINGLE ENDED LINKS
A data transmission system includes a first circuit, a second circuit, and a reference voltage generation circuit. The first circuit includes a transmitter powered by a first power supply voltage and having an input for receiving a data output signal, and an output. The second circuit includes a receiver powered by a second power supply voltage and having a first input coupled to the output of the transmitter, a second input for receiving a reference voltage, and an output for providing a data input signal. The reference voltage generation circuit forms the reference voltage by mixing a first signal generated by the first circuit based on the first power supply voltage and a second signal generated by the second circuit based on the second power supply voltage.
NOISE MITIGATION IN SINGLE ENDED LINKS
A data transmission system includes a first circuit, a second circuit, and a reference voltage generation circuit. The first circuit includes a transmitter powered by a first power supply voltage and having an input for receiving a data output signal, and an output. The second circuit includes a receiver powered by a second power supply voltage and having a first input coupled to the output of the transmitter, a second input for receiving a reference voltage, and an output for providing a data input signal. The reference voltage generation circuit forms the reference voltage by mixing a first signal generated by the first circuit based on the first power supply voltage and a second signal generated by the second circuit based on the second power supply voltage.
Two-wire industrial process field device power supply circuitry
An industrial process field device includes first and second loop terminals configured to couple to a two-wire process control loop. Device circuitry is powered from the process control loop and monitors a process variable or controls a control device. A current regulator is in series with the loop terminals, and regulates a loop current. A first shunt voltage regulator regulates a voltage across the device circuitry. Supplemental circuitry is connected in series with the first shunt voltage regulator and the second loop terminal, and is powered by power from the two-wire process control loop shunted through the first shunt voltage regulator. A second shunt voltage regulator is connected in series with the first shunt voltage regulator and the second loop terminal, and in parallel with the supplemental circuitry, and regulates a voltage across the supplemental circuitry.
Two-wire industrial process field device power supply circuitry
An industrial process field device includes first and second loop terminals configured to couple to a two-wire process control loop. Device circuitry is powered from the process control loop and monitors a process variable or controls a control device. A current regulator is in series with the loop terminals, and regulates a loop current. A first shunt voltage regulator regulates a voltage across the device circuitry. Supplemental circuitry is connected in series with the first shunt voltage regulator and the second loop terminal, and is powered by power from the two-wire process control loop shunted through the first shunt voltage regulator. A second shunt voltage regulator is connected in series with the first shunt voltage regulator and the second loop terminal, and in parallel with the supplemental circuitry, and regulates a voltage across the supplemental circuitry.
Power down detection for non-destructive isolation signal generation
A power detection circuit for detecting powering down of a voltage domain in an integrated circuit is disclosed. The power detection circuit is placed in or near the voltage domain in the integrated circuit to provide power detection on the integrated circuit. The power detection circuit detects powering down of the voltage domain to provide an isolation enable signal to another voltage domain that interfaces with the powering down voltage domain. The isolation enable signal may be used by an isolation cell coupled to the non-powering down voltage domain to prevent corrupted logic being received from the powering down voltage domain.
Power down detection for non-destructive isolation signal generation
A power detection circuit for detecting powering down of a voltage domain in an integrated circuit is disclosed. The power detection circuit is placed in or near the voltage domain in the integrated circuit to provide power detection on the integrated circuit. The power detection circuit detects powering down of the voltage domain to provide an isolation enable signal to another voltage domain that interfaces with the powering down voltage domain. The isolation enable signal may be used by an isolation cell coupled to the non-powering down voltage domain to prevent corrupted logic being received from the powering down voltage domain.
Low drop real-time-clock battery voltage control circuit for application specific integrated circuit in an engine control module
Systems and apparatuses include a circuit structured to communicate with a real-time-clock battery and to selectively communicate with a vehicle battery, inhibit communication between the real-time-clock battery and a controller when a first voltage is received from the vehicle battery, and provide a communication from the real-time-clock battery to the controller when the first voltage is not received.
Adaptive voltage scaling scanning method and associated electronic device
The present invention discloses an AVS scanning method, wherein the AVS scanning method includes the steps of: mounting a system on chip (SoC) on a printed circuit board (PCB), and connecting the SoC to a storage unit; enabling the SoC to read a boot code from the storage unit, and executing the boot code to perform an AVS scanning operation on the SoC to determine a plurality of target supply voltages respectively corresponding to a plurality of operating frequencies of the SoC to establish an AVS look-up table; and storing the AVS look-up table into the SoC or the storage unit.
Interconnection element, PSE component and method for monitoring and protecting a PoDL network
Techniques are disclosed relating to limiting power in Power over Data Line (PoDL) networks. In an embodiment, an apparatus includes a voltage terminal including a first pole and a second pole, a first line for connecting the first pole to a first terminal of a physical layer of a microelectronic component, and a second line for connecting the second pole to a second terminal of the physical layer. The apparatus may further include a switch element in each of the first and second line, where each switch element is connected to and controllable by a control unit and the control unit includes a microprocessor. The apparatus may further include a voltage measurement unit configured to measure a voltage drop over each switch element and supply the voltage drop to the microprocessor.
LOW POWER DIGITAL LOW-DROPOUT POWER REGULATOR
Digital logic voltage regulators and related methods generate a regulated voltage via controlled switching of a power transistor. A digital logic voltage regulator includes a voltage level comparator, a power transistor, and a charge accumulator. The voltage level comparator generates a digital control signal that alternates between a first voltage level and a second voltage level in response to changes in relative voltage level between the regulated output voltage and the target voltage. The digital control signal causes the power transistor to switch from off to on in response to a reduction of the regulated output voltage relative to the target voltage and causes the power transistor to switch from on to off in response to an increase of the regulated output voltage relative to the target voltage. The charge accumulator decreases variation in the regulated output voltage that would occur without the charge accumulator.